llvm-6502/test/CodeGen
Daniel Sanders f89ddfccc0 Add support for legalizing SETNE/SETEQ by inverting the condition code and the result of the comparison.
Summary:
LegalizeSetCCCondCode can now legalize SETEQ and SETNE by returning the inverse
condition and requesting that the caller invert the result of the condition.

The caller of LegalizeSetCCCondCode must handle the inverted CC, and they do
so as follows:
  SETCC, BR_CC:
    Invert the result of the SETCC with SelectionDAG::getNOT()
  SELECT_CC:
    Swap the true/false operands.

This is necessary for MSA which lacks an integer SETNE instruction.

Reviewers: resistor

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2229

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195355 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-21 13:24:49 +00:00
..
AArch64 Implemented Neon scalar vdup_lane intrinsics. 2013-11-21 08:16:15 +00:00
ARM [PR17978] Mark two ARM/fast-isel tests as XFAIL:vg_leak due to GV. 2013-11-18 13:50:19 +00:00
CPP [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00
Generic Revert r195317 (and r195333), "Teach ISel not to optimize 'optnone' functions." 2013-11-21 10:55:15 +00:00
Hexagon TBAA: remove !tbaa from testing cases when they are not needed. 2013-09-30 18:17:35 +00:00
Inputs Debug Info: add an identifier field to DICompositeType. 2013-08-26 22:39:55 +00:00
Mips Add support for legalizing SETNE/SETEQ by inverting the condition code and the result of the comparison. 2013-11-21 13:24:49 +00:00
MSP430 Make sure SP is always aligned on a 2 byte boundary 2013-10-24 09:32:31 +00:00
NVPTX [NVPTX] Fix handling of indirect calls 2013-11-15 12:30:04 +00:00
PowerPC PPC popcnt[dw] do not have record forms 2013-11-20 20:54:55 +00:00
R600 R600/SI: Fix moveToVALU when the first operand is VSrc. 2013-11-18 20:09:55 +00:00
SPARC [SparcV9] Handle i64 <-> float conversions in sparcv9 mode. 2013-11-03 12:28:40 +00:00
SystemZ [SystemZ] Automatically detect zEC12 and z196 hosts 2013-10-31 12:14:17 +00:00
Thumb 17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets 2013-10-17 19:52:05 +00:00
Thumb2 Enable generating legacy IT block for AArch32 2013-11-13 18:29:49 +00:00
X86 The basic problem is that some mainstream programs cannot deal with the way 2013-11-21 07:04:30 +00:00
XCore Error if we see an alias to a declaration. 2013-11-14 13:58:06 +00:00