llvm-6502/test/CodeGen
Chandler Carruth fa2dfaedf2 [x86] Teach the new vector shuffle lowering about the zero masking
abilities of INSERTPS which are really powerful and come up in very
important contexts such as forming diagonal matrices, etc.

With this I ended up being able to remove the somewhat weird helper
I added for INSERTPS because we can collapse the entire state to a no-op
mask. Added a bunch of tests for inserting into a zero-ish vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217117 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-04 01:13:48 +00:00
..
AArch64 Reapply r216805 "[MachineCombiner][AArch64] Use the correct register class for MADD, SUB, and OR."" 2014-09-03 07:07:10 +00:00
ARM Missing test from r216989 2014-09-02 22:46:18 +00:00
CPP
Generic Add a regression test to sanity check the PBQP allocator. 2014-09-03 18:04:10 +00:00
Hexagon
Inputs
Mips Replace -use-init-array with -use-ctors. 2014-09-02 13:54:53 +00:00
MSP430
NVPTX
PowerPC Enable splitting indexing from loads with TargetConstants 2014-09-02 16:05:23 +00:00
R600 R600/SI: Try to keep i32 mul on SALU 2014-09-03 23:24:35 +00:00
SPARC
SystemZ
Thumb Check-label a bit more specific 2014-09-03 13:32:08 +00:00
Thumb2
X86 [x86] Teach the new vector shuffle lowering about the zero masking 2014-09-04 01:13:48 +00:00
XCore