llvm-6502/test/CodeGen
Jim Grosbach 7a37166a7a X86: Enable ISel of 16-bit MOVBE instructions.
When the MOVBE instructions are available, use them for 16-bit endian
swapping as well as for 32 and 64 bit.

The patterns were already present on the instructions, but weren't being
matched because the operation was unconditionally marked to 'Expand.'
Change that to be conditional on whether the MOVBE instructions are
available. Use 'rolw' to implement the in-register version (32 and 64
bit have the dedicated 'bswap' instruction for that).

Patch by Louis Gerbarg <lgg@apple.com>.

rdar://15479984

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203524 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-11 00:44:14 +00:00
..
AArch64 Fix undefined behavior in vector shift tests. 2014-03-11 00:01:41 +00:00
ARM Fix undefined behavior in vector shift tests. 2014-03-11 00:01:41 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips] Implement NaCl sandboxing of loads, stores and SP changes: 2014-03-10 20:34:23 +00:00
MSP430
NVPTX Followup to r203483 - add test. 2014-03-10 20:36:04 +00:00
PowerPC Fixup PPC Darwin i1 argument handling 2014-03-06 00:45:19 +00:00
R600 R600/SI: Using SGPRs is illegal for instructions that read carry-out from VCC 2014-03-07 20:12:39 +00:00
SPARC
SystemZ Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call 2014-02-13 14:44:26 +00:00
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X86 X86: Enable ISel of 16-bit MOVBE instructions. 2014-03-11 00:44:14 +00:00
XCore