mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-16 11:30:51 +00:00
717d41d8c3
- Added KSHIFTB/D/Q for skx - Added KORTESTB/D/Q for skx - Fixed store operation for v8i1 type for KNL - Store size of v8i1, v4i1 and v2i1 are changed to 8 bits git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227043 91177308-0d34-0410-b5e6-96231b3b80d8
134 lines
3.7 KiB
LLVM
134 lines
3.7 KiB
LLVM
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=KNL --check-prefix=CHECK
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; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=SKX --check-prefix=CHECK
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; CHECK-LABEL: mask16
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; CHECK: kmovw
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; CHECK-NEXT: knotw
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; CHECK-NEXT: kmovw
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define i16 @mask16(i16 %x) {
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%m0 = bitcast i16 %x to <16 x i1>
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%m1 = xor <16 x i1> %m0, <i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1>
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%ret = bitcast <16 x i1> %m1 to i16
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ret i16 %ret
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}
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; CHECK-LABEL: mask8
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; KNL: kmovw
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; KNL-NEXT: knotw
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; KNL-NEXT: kmovw
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; SKX: kmovb
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; SKX-NEXT: knotb
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; SKX-NEXT: kmovb
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define i8 @mask8(i8 %x) {
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%m0 = bitcast i8 %x to <8 x i1>
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%m1 = xor <8 x i1> %m0, <i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1>
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%ret = bitcast <8 x i1> %m1 to i8
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ret i8 %ret
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}
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; CHECK-LABEL: mask16_mem
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; CHECK: kmovw ([[ARG1:%rdi|%rcx]]), %k{{[0-7]}}
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; CHECK-NEXT: knotw
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; CHECK-NEXT: kmovw %k{{[0-7]}}, ([[ARG1]])
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; CHECK: ret
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define void @mask16_mem(i16* %ptr) {
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%x = load i16* %ptr, align 4
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%m0 = bitcast i16 %x to <16 x i1>
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%m1 = xor <16 x i1> %m0, <i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1>
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%ret = bitcast <16 x i1> %m1 to i16
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store i16 %ret, i16* %ptr, align 4
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ret void
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}
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; CHECK-LABEL: mask8_mem
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; KNL: kmovw ([[ARG1]]), %k{{[0-7]}}
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; KNL-NEXT: knotw
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; KNL-NEXT: kmovw %k{{[0-7]}}, ([[ARG1]])
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; SKX: kmovb ([[ARG1]]), %k{{[0-7]}}
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; SKX-NEXT: knotb
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; SKX-NEXT: kmovb %k{{[0-7]}}, ([[ARG1]])
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define void @mask8_mem(i8* %ptr) {
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%x = load i8* %ptr, align 4
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%m0 = bitcast i8 %x to <8 x i1>
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%m1 = xor <8 x i1> %m0, <i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1>
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%ret = bitcast <8 x i1> %m1 to i8
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store i8 %ret, i8* %ptr, align 4
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ret void
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}
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; CHECK-LABEL: mand16
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; CHECK: kandw
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; CHECK: kxorw
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; CHECK: korw
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define i16 @mand16(i16 %x, i16 %y) {
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%ma = bitcast i16 %x to <16 x i1>
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%mb = bitcast i16 %y to <16 x i1>
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%mc = and <16 x i1> %ma, %mb
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%md = xor <16 x i1> %ma, %mb
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%me = or <16 x i1> %mc, %md
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%ret = bitcast <16 x i1> %me to i16
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ret i16 %ret
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}
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; CHECK-LABEL: shuf_test1
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; CHECK: kshiftrw $8
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define i8 @shuf_test1(i16 %v) nounwind {
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%v1 = bitcast i16 %v to <16 x i1>
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%mask = shufflevector <16 x i1> %v1, <16 x i1> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
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%mask1 = bitcast <8 x i1> %mask to i8
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ret i8 %mask1
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}
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; CHECK-LABEL: zext_test1
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; CHECK: kshiftlw
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; CHECK: kshiftrw
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; CHECK: kmovw
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define i32 @zext_test1(<16 x i32> %a, <16 x i32> %b) {
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%cmp_res = icmp ugt <16 x i32> %a, %b
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%cmp_res.i1 = extractelement <16 x i1> %cmp_res, i32 5
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%res = zext i1 %cmp_res.i1 to i32
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ret i32 %res
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}
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; CHECK-LABEL: zext_test2
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; CHECK: kshiftlw
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; CHECK: kshiftrw
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; CHECK: kmovw
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define i16 @zext_test2(<16 x i32> %a, <16 x i32> %b) {
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%cmp_res = icmp ugt <16 x i32> %a, %b
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%cmp_res.i1 = extractelement <16 x i1> %cmp_res, i32 5
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%res = zext i1 %cmp_res.i1 to i16
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ret i16 %res
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}
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; CHECK-LABEL: zext_test3
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; CHECK: kshiftlw
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; CHECK: kshiftrw
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; CHECK: kmovw
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define i8 @zext_test3(<16 x i32> %a, <16 x i32> %b) {
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%cmp_res = icmp ugt <16 x i32> %a, %b
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%cmp_res.i1 = extractelement <16 x i1> %cmp_res, i32 5
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%res = zext i1 %cmp_res.i1 to i8
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ret i8 %res
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}
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; CHECK-LABEL: conv1
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; KNL: kmovw %k0, %eax
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; KNL: movb %al, (%rdi)
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; SKX: kmovb %k0, (%rdi)
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define i8 @conv1(<8 x i1>* %R) {
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entry:
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store <8 x i1> <i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1>, <8 x i1>* %R
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%maskPtr = alloca <8 x i1>
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store <8 x i1> <i1 0, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1>, <8 x i1>* %maskPtr
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%mask = load <8 x i1>* %maskPtr
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%mask_convert = bitcast <8 x i1> %mask to i8
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ret i8 %mask_convert
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} |