llvm-6502/test/CodeGen
Nadav Rotem fc3623bc50 Add methods to support the integer-promotion of vector types. Methods to
legalize SDNodes such as BUILD_VECTOR, EXTRACT_VECTOR_ELT, etc.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-06 20:55:56 +00:00
..
Alpha
ARM Another possible bug. Stopgap until we can autogenerate tables and 2011-06-03 22:09:12 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic Add methods to support the integer-promotion of vector types. Methods to 2011-06-06 20:55:56 +00:00
MBlaze
Mips Detect FI|cst pattern in MipsDAGToDAGISel::SelectAddr. Patch by Sasa Stankovic. 2011-06-02 01:03:14 +00:00
MSP430 Fix register-dependent test in MSP430. 2011-05-04 01:01:39 +00:00
PowerPC Fix wrong usages of CTR/MCTR where CTR8/MCTR8 was meant. 2011-06-03 15:47:49 +00:00
PTX PTX: add flag to disable mad/fma selection 2011-05-18 15:42:23 +00:00
SPARC Fix more register and coalescing dependencies. 2011-05-04 19:02:11 +00:00
SystemZ
Thumb Move this test to CodeGen/Thumb. rdar://problem/9416774 2011-05-11 19:41:28 +00:00
Thumb2 Switch AllocationOrder to using RegisterClassInfo instead of a BitVector 2011-06-03 20:34:53 +00:00
X86 Test case for PR10085. 2011-06-06 20:03:22 +00:00
XCore Add XCore intrinsic for crc8. 2011-05-31 16:24:49 +00:00