Michael Kuperstein fd350586f5 [DAGCombine] Slightly improve lowering of BUILD_VECTOR into a shuffle. ... This handles the case of a BUILD_VECTOR being constructed out of elements extracted from a vector twice the size of the result vector. Previously this was always scalarized. Now, we try to construct a shuffle node that feeds on extract_subvectors. This fixes PR15872 and provides a partial fix for PR21711. Differential Revision: http://reviews.llvm.org/D6678 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224429 91177308-0d34-0410-b5e6-96231b3b80d8		2014-12-17 12:32:17 +00:00
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CostTable.h
Target.td	[Statepoints 2/4] Statepoint infrastructure for garbage collection: MI & x86-64 Backend	2014-12-01 22:52:56 +00:00
TargetCallingConv.h
TargetCallingConv.td	[mips] Remove MipsCC::analyzeCallOperands in favour of CCState::AnalyzeCallOperands. NFC	2014-11-07 11:43:49 +00:00
TargetFrameLowering.h	[Statepoints 2/4] Statepoint infrastructure for garbage collection: MI & x86-64 Backend	2014-12-01 22:52:56 +00:00
TargetInstrInfo.h	Add Forward Control-Flow Integrity.	2014-11-11 21:08:02 +00:00
TargetIntrinsicInfo.h	Trailing whitespace.	2014-07-23 00:42:52 +00:00
TargetItinerary.td
TargetLibraryInfo.h	Add fortified (__*_chk) library functions to TLI (NFC)	2014-11-12 21:23:34 +00:00
TargetLowering.h	[DAGCombine] Slightly improve lowering of BUILD_VECTOR into a shuffle.	2014-12-17 12:32:17 +00:00
TargetLoweringObjectFile.h	Remove a bit of dead code.	2014-11-12 01:27:22 +00:00
TargetMachine.h	This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively	2014-11-13 09:26:31 +00:00
TargetOpcodes.h	[Statepoints 2/4] Statepoint infrastructure for garbage collection: MI & x86-64 Backend	2014-12-01 22:52:56 +00:00
TargetOptions.h	Make sure that the TargetOptions operator== is checking the	2014-12-02 21:57:15 +00:00
TargetRegisterInfo.h	Add function that translates subregister lane masks to other subregs.	2014-12-10 01:12:00 +00:00
TargetSchedule.td	Move Post RA Scheduling flag bit into SchedMachineModel	2014-07-15 22:39:58 +00:00
TargetSelectionDAG.td	Masked Load / Store Intrinsics - the CodeGen part.	2014-12-04 09:40:44 +00:00
TargetSelectionDAGInfo.h	Trailing whitespace.	2014-07-23 00:42:52 +00:00
TargetSubtargetInfo.h	Add a flag to enable/disable subregister liveness.	2014-12-10 01:12:30 +00:00