llvm-6502/lib/Target/Alpha
Anton Korobeynikov 928eb49cae Make processor FUs unique for given itinerary. This extends the limit of 32
FU per CPU arch to 32 per intinerary allowing precise modelling of quite
complex pipelines in the future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101754 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-18 20:31:01 +00:00
..
AsmPrinter prune some #includes. 2010-04-05 04:04:10 +00:00
TargetInfo make -fno-rtti the default unless a directory builds with REQUIRES_RTTI. 2010-01-24 20:43:08 +00:00
Alpha.h eliminate all the dead addSimpleCodeEmitter implementations. 2010-02-02 21:31:47 +00:00
Alpha.td Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. 2010-04-05 03:10:20 +00:00
AlphaBranchSelector.cpp Remove includes of Support/Compiler.h that are no longer needed after the 2009-10-25 06:57:41 +00:00
AlphaCallingConv.td Fix PR6444, note still doesn't compile libgcc2 all the way, but fixes that error. May not fix it in an ABI complient way. It wasn't clear what gcc does 2010-03-03 20:15:31 +00:00
AlphaCodeEmitter.cpp Add const qualifiers to CodeGen's use of LLVM IR constructs. 2010-04-15 01:51:59 +00:00
AlphaInstrFormats.td use ins/outs. 2010-03-18 20:55:18 +00:00
AlphaInstrInfo.cpp use DebugLoc default ctor instead of DebugLoc::getUnknownLoc() 2010-04-02 20:16:16 +00:00
AlphaInstrInfo.h Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of 2009-12-05 00:44:40 +00:00
AlphaInstrInfo.td use ins/outs. 2010-03-18 20:55:18 +00:00
AlphaISelDAGToDAG.cpp Use const qualifiers with TargetLowering. This eliminates several 2010-04-17 15:26:15 +00:00
AlphaISelLowering.cpp Use const qualifiers with TargetLowering. This eliminates several 2010-04-17 15:26:15 +00:00
AlphaISelLowering.h Use const qualifiers with TargetLowering. This eliminates several 2010-04-17 15:26:15 +00:00
AlphaJITInfo.cpp Change indirect-globals to use a dedicated allocIndirectGV. This lets us 2009-12-15 22:42:46 +00:00
AlphaJITInfo.h * Move stub allocation inside the JITEmitter, instead of exposing a 2009-11-23 23:35:19 +00:00
AlphaLLRP.cpp use DebugLoc default ctor instead of DebugLoc::getUnknownLoc() 2010-04-02 20:16:16 +00:00
AlphaMachineFunctionInfo.h Move per-function state out of TargetLowering subclasses and into 2010-04-17 14:41:14 +00:00
AlphaMCAsmInfo.cpp Eliminate SetDirective, and replace it with HasSetDirective. 2010-01-26 20:40:54 +00:00
AlphaMCAsmInfo.h Rename TargetAsmInfo (and its subclasses) to MCAsmInfo. 2009-08-22 20:48:53 +00:00
AlphaRegisterInfo.cpp Delete now-unnecessary const_casts. 2010-04-17 15:32:28 +00:00
AlphaRegisterInfo.h Change the Value argument to eliminateFrameIndex to a type-tagged value. This 2010-03-09 21:45:49 +00:00
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td Make processor FUs unique for given itinerary. This extends the limit of 32 2010-04-18 20:31:01 +00:00
AlphaSelectionDAGInfo.cpp Add skeleton target-specific SelectionDAGInfo files. 2010-04-16 23:04:22 +00:00
AlphaSelectionDAGInfo.h Add skeleton target-specific SelectionDAGInfo files. 2010-04-16 23:04:22 +00:00
AlphaSubtarget.cpp Normalize Subtarget constructors to take a target triple string instead of 2009-08-02 22:11:08 +00:00
AlphaSubtarget.h Normalize Subtarget constructors to take a target triple string instead of 2009-08-02 22:11:08 +00:00
AlphaTargetMachine.cpp eliminate all the dead addSimpleCodeEmitter implementations. 2010-02-02 21:31:47 +00:00
AlphaTargetMachine.h Use const qualifiers with TargetLowering. This eliminates several 2010-04-17 15:26:15 +00:00
CMakeLists.txt Add skeleton target-specific SelectionDAGInfo files. 2010-04-16 23:04:22 +00:00
Makefile make -fno-rtti the default unless a directory builds with REQUIRES_RTTI. 2010-01-24 20:43:08 +00:00
README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html