Chad Rosier fe5c9cee80 [AArch64] Implement the isTruncateFree API. ... In AArch64 i64 to i32 truncate operation is a subregister access. This allows more opportunities for LSR optmization to eliminate variables of different types (i32 and i64). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205925 91177308-0d34-0410-b5e6-96231b3b80d8		2014-04-09 20:43:40 +00:00
..
AArch64	[AArch64] Implement the isTruncateFree API.	2014-04-09 20:43:40 +00:00
ARM	ARM: yet another round of ARM test clean ups	2014-04-03 23:47:24 +00:00
ARM64	[DAGCombiner] DAG combine does not know how to combine indexed loads with	2014-04-09 20:03:05 +00:00
CPP	Begin adding docs and IR-level support for the inalloca attribute	2013-12-19 02:14:12 +00:00
Generic	CommandLine: Exit successfully for -version and -help	2014-02-28 19:08:01 +00:00
Hexagon	Fix broken CHECK lines	2014-02-16 07:31:05 +00:00
Inputs
Mips	Re-commit: [mips] abs.[ds], and neg.[ds] should be allowed regardless of -enable-no-nans-fp-math	2014-04-09 09:56:43 +00:00
MSP430	Mark FPB as a reserved register when needed.	2014-04-02 13:13:56 +00:00
NVPTX	[NVPTX] Add preliminary intrinsics and codegen support for textures/surfaces	2014-04-09 15:39:15 +00:00
PowerPC	[PowerPC] Add a full condition code register to make the "cc" clobber work	2014-04-04 15:15:57 +00:00
R600	R600/SI: Match not instruction.	2014-04-09 07:16:16 +00:00
SPARC	Remove the linker_private and linker_private_weak linkages.	2014-03-13 23:18:37 +00:00
SystemZ	[SystemZ] Add support for z196 float<->unsigned conversions	2014-03-21 10:56:30 +00:00
Thumb	ARM: yet another round of ARM test clean ups	2014-04-03 23:47:24 +00:00
Thumb2	ARM: fix test case missed in previous roundup	2014-04-04 01:19:56 +00:00
X86	AVX-512: insert element to mask vector; store i1 data	2014-04-09 12:37:50 +00:00
XCore	[XCore] Add support for the "m" inline asm constraint.	2014-03-06 16:37:48 +00:00