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https://github.com/c64scene-ar/llvm-6502.git
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fe5cb19405
proves to be worth 20% on Ptrdist/ks. Might be related to dependency breaking support. 2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These are used for FR32 / FR64 reg-to-reg copies. 3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to spill / restore FsMOVAPSrr and FsMOVAPDrr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26241 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
Alpha | ||
CBackend | ||
IA64 | ||
PowerPC | ||
Skeleton | ||
Sparc | ||
SparcV8 | ||
SparcV9 | ||
X86 | ||
Makefile | ||
MRegisterInfo.cpp | ||
README.txt | ||
SubtargetFeature.cpp | ||
Target.td | ||
TargetData.cpp | ||
TargetFrameInfo.cpp | ||
TargetInstrInfo.cpp | ||
TargetMachine.cpp | ||
TargetMachineRegistry.cpp | ||
TargetSchedInfo.cpp | ||
TargetSchedule.td | ||
TargetSelectionDAG.td | ||
TargetSubtarget.cpp |
Target Independent Opportunities: ===-------------------------------------------------------------------------=== FreeBench/mason contains code like this: static p_type m0u(p_type p) { int m[]={0, 8, 1, 2, 16, 5, 13, 7, 14, 9, 3, 4, 11, 12, 15, 10, 17, 6}; p_type pu; pu.a = m[p.a]; pu.b = m[p.b]; pu.c = m[p.c]; return pu; } We currently compile this into a memcpy from a static array into 'm', then a bunch of loads from m. It would be better to avoid the memcpy and just do loads from the static array. ===-------------------------------------------------------------------------=== Get the C front-end to expand hypot(x,y) -> llvm.sqrt(x*x+y*y) when errno and precision don't matter (ffastmath). Misc/mandel will like this. :) //===---------------------------------------------------------------------===// Solve this DAG isel folding deficiency: int X, Y; void fn1(void) { X = X | (Y << 3); } compiles to fn1: movl Y, %eax shll $3, %eax orl X, %eax movl %eax, X ret The problem is the store's chain operand is not the load X but rather a TokenFactor of the load X and load Y, which prevents the folding. There are two ways to fix this: 1. The dag combiner can start using alias analysis to realize that y/x don't alias, making the store to X not dependent on the load from Y. 2. The generated isel could be made smarter in the case it can't disambiguate the pointers. Number 1 is the preferred solution. //===---------------------------------------------------------------------===// DAG combine this into mul A, 8: int %test(int %A) { %B = mul int %A, 8 ;; shift %C = add int %B, 7 ;; dead, no demanded bits. %D = and int %C, -8 ;; dead once add is gone. ret int %D } This sort of thing occurs in the alloca lowering code and other places that are generating alignment of an already aligned value.