llvm-6502/lib/CodeGen
Jakob Stoklund Olesen c9cf9e94ec Create two BlockInfo entries when a live range is discontinuous through a block.
Delete the Kill and Def markers in BlockInfo. They are no longer
necessary when BlockInfo describes a continuous live range.

This only affects the relatively rare kind of basic block where a live
range looks like this:

 |---x   o---|

Now live range splitting can pretend that it is looking at two blocks:

 |---x
         o---|

This allows the code to be simplified a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132245 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-28 02:33:00 +00:00
..
AsmPrinter Select DW_AT_const_value size based on global variable size. 2011-05-28 00:39:18 +00:00
SelectionDAG Refactor getActionType and getTypeToTransformTo ; place all of the 'decision' 2011-05-27 21:03:13 +00:00
AggressiveAntiDepBreaker.cpp Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
AggressiveAntiDepBreaker.h
AllocationOrder.cpp Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic. 2011-01-10 02:58:51 +00:00
AllocationOrder.h Try harder to get the hint by preferring to evict hint interference. 2011-02-25 01:04:22 +00:00
Analysis.cpp Minor code re-structuring. 2011-03-19 17:03:16 +00:00
AntiDepBreaker.h
BranchFolding.cpp Add comment. 2011-05-26 21:49:28 +00:00
BranchFolding.h Re-commit 131172 with fix. MachineInstr identity checks should check dead 2011-05-12 00:56:58 +00:00
CalcSpillWeights.cpp Teach LiveInterval::isZeroLength about null SlotIndexes. 2011-05-16 23:50:05 +00:00
CallingConvLower.cpp Reverting 132105: it broke some LLVM-GCC DejaGNU tests. 2011-05-26 04:09:49 +00:00
CMakeLists.txt Add an InterferenceCache class for caching per-block interference ranges. 2011-04-02 06:03:35 +00:00
CodeGen.cpp
CodePlacementOpt.cpp Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
CriticalAntiDepBreaker.cpp Fix PostRA antidependence breaker. 2011-02-08 17:39:46 +00:00
CriticalAntiDepBreaker.h Typo. 2011-02-09 22:55:48 +00:00
DeadMachineInstructionElim.cpp Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic. 2011-01-10 02:58:51 +00:00
DwarfEHPrepare.cpp Remove PHINode::reserveOperandSpace(). Instead, add a parameter to 2011-03-30 11:28:46 +00:00
EdgeBundles.cpp Build the Hopfield network incrementally when splitting global live ranges. 2011-04-09 02:59:09 +00:00
ELF.h Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
ELFCodeEmitter.cpp
ELFCodeEmitter.h
ELFWriter.cpp Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
ELFWriter.h
ExpandISelPseudos.cpp Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
GCMetadata.cpp
GCMetadataPrinter.cpp
GCStrategy.cpp Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there. 2011-01-10 12:39:04 +00:00
IfConversion.cpp Re-commit 131172 with fix. MachineInstr identity checks should check dead 2011-05-12 00:56:58 +00:00
InlineSpiller.cpp Avoid hoisting spills when looking at a copy from another register that is also 2011-05-11 18:25:10 +00:00
InterferenceCache.cpp Precompute interference for neighbor blocks as long as there is no interference. 2011-04-09 02:59:05 +00:00
InterferenceCache.h Precompute interference for neighbor blocks as long as there is no interference. 2011-04-09 02:59:05 +00:00
IntrinsicLowering.cpp
LatencyPriorityQueue.cpp
LiveDebugVariables.cpp Remove an assertion to fix PR9872. 2011-05-08 19:21:08 +00:00
LiveDebugVariables.h Update LiveDebugVariables after live range splitting. 2011-05-06 18:00:02 +00:00
LiveInterval.cpp Replace a broken LiveInterval::MergeValueInAsValue() with something simpler. 2011-03-19 23:02:49 +00:00
LiveIntervalAnalysis.cpp When a physreg is live-in and live through a basic block, make sure its live 2011-04-30 19:12:33 +00:00
LiveIntervalUnion.cpp Speed up eviction by stopping collectInterferingVRegs as soon as the spill 2011-04-11 21:47:01 +00:00
LiveIntervalUnion.h Reuse live interval union between functions. This saves a bit of compile time 2011-04-11 23:57:14 +00:00
LiveRangeEdit.cpp Add some statistics to the splitting and spilling frameworks. 2011-05-05 17:22:53 +00:00
LiveRangeEdit.h Update LiveDebugVariables after live range splitting. 2011-05-06 18:00:02 +00:00
LiveStackAnalysis.cpp
LiveVariables.cpp Reduce vector reallocations. 2011-03-08 17:28:36 +00:00
LLVMTargetMachine.cpp Stub out support for Win64-style exceptions. Note that this is merely using 2011-05-27 23:47:32 +00:00
LocalStackSlotAllocation.cpp Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there. 2011-01-10 12:39:04 +00:00
LowerSubregs.cpp Trailing whitespace. 2011-02-25 22:53:20 +00:00
MachineBasicBlock.cpp Simplify declarations slightly by using typedefs. 2011-04-18 21:21:37 +00:00
MachineCSE.cpp Re-revert r130877; it's apparently causing a regression on 197.parser, 2011-05-06 05:23:07 +00:00
MachineDominators.cpp
MachineFunction.cpp Make the logic for determining function alignment more explicit. No functionality change. 2011-05-06 20:34:06 +00:00
MachineFunctionAnalysis.cpp
MachineFunctionPass.cpp
MachineFunctionPrinterPass.cpp
MachineInstr.cpp Re-commit 131172 with fix. MachineInstr identity checks should check dead 2011-05-12 00:56:58 +00:00
MachineLICM.cpp Look pass copies when determining whether hoisting would end up inserting more copies. rdar://9266679 2011-04-11 21:09:18 +00:00
MachineLoopInfo.cpp
MachineLoopRanges.cpp
MachineModuleInfo.cpp
MachineModuleInfoImpls.cpp
MachinePassRegistry.cpp
MachineRegisterInfo.cpp Revert r124611 - "Keep track of incoming argument's location while emitting LiveIns." 2011-02-21 23:21:26 +00:00
MachineSink.cpp Fix a couple of places where changes are made but not tracked. 2011-04-11 18:47:20 +00:00
MachineSSAUpdater.cpp
MachineVerifier.cpp Revert r128961 because it didn't include a test and causes the verifier to fail 2011-05-19 01:56:19 +00:00
Makefile
ObjectCodeEmitter.cpp
OcamlGC.cpp
OptimizePHIs.cpp
Passes.cpp Update comment. 2011-04-30 03:13:08 +00:00
PeepholeOptimizer.cpp Add a peephole optimization to optimize pairs of bitcasts. e.g. 2011-03-15 05:13:13 +00:00
PHIElimination.cpp Remove unused STL header includes. 2011-04-23 19:53:52 +00:00
PHIEliminationUtils.cpp
PHIEliminationUtils.h
PostRASchedulerList.cpp Typo: Reviewed by Alistair. 2011-05-06 18:14:32 +00:00
PreAllocSplitting.cpp
ProcessImplicitDefs.cpp Place context in member variables instead of passing around pointers. 2011-03-14 20:57:14 +00:00
PrologEpilogInserter.cpp Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
PrologEpilogInserter.h
PseudoSourceValue.cpp
README.txt Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
RegAllocBase.h Fix PR9883. Make sure all caches are invalidated when a live range is repaired. 2011-05-10 17:37:41 +00:00
RegAllocBasic.cpp Fix PR9883. Make sure all caches are invalidated when a live range is repaired. 2011-05-10 17:37:41 +00:00
RegAllocFast.cpp Typo 2011-04-22 01:40:20 +00:00
RegAllocGreedy.cpp Create two BlockInfo entries when a live range is discontinuous through a block. 2011-05-28 02:33:00 +00:00
RegAllocLinearScan.cpp Remove unused STL header includes. 2011-04-23 19:53:52 +00:00
RegAllocPBQP.cpp Make SpillIs an optional pointer. Avoid creating a bunch of temporary SmallVectors. 2011-03-10 01:21:58 +00:00
RegisterCoalescer.cpp
RegisterScavenging.cpp Handle <def,undef> in the second loop as well. 2011-05-02 20:36:53 +00:00
RenderMachineFunction.cpp Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
RenderMachineFunction.h
ScheduleDAG.cpp Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
ScheduleDAGEmit.cpp
ScheduleDAGInstrs.cpp Added an assertion, and updated a comment. 2011-05-06 21:52:52 +00:00
ScheduleDAGInstrs.h
ScheduleDAGPrinter.cpp Pass the graph to the DOTGraphTraits.getEdgeAttributes(). 2011-02-27 04:11:03 +00:00
ScoreboardHazardRecognizer.cpp Convert -enable-sched-cycles and -enable-sched-hazard to -disable 2011-01-21 05:51:33 +00:00
ShadowStackGC.cpp
ShrinkWrapping.cpp Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
SimpleRegisterCoalescing.cpp Fix PR9962 by properly constraining register classes in RemoveCopyByCommutingDef(). This 2011-05-20 23:25:36 +00:00
SimpleRegisterCoalescing.h Eliminate dead dead code elimination code. 2011-05-18 04:51:15 +00:00
SjLjEHPrepare.cpp Give the 'eh.sjlj.dispatchsetup' intrinsic call the value coming from the setjmp 2011-05-11 01:11:55 +00:00
SlotIndexes.cpp Use basic block numbers as indexes when mapping slot index ranges. 2011-04-02 06:03:31 +00:00
Spiller.cpp Remove unused STL header includes. 2011-04-23 19:53:52 +00:00
Spiller.h Change the Spiller interface to take a LiveRangeEdit reference. 2011-03-10 01:51:42 +00:00
SpillPlacement.cpp Build the Hopfield network incrementally when splitting global live ranges. 2011-04-09 02:59:09 +00:00
SpillPlacement.h Build the Hopfield network incrementally when splitting global live ranges. 2011-04-09 02:59:09 +00:00
SplitKit.cpp Create two BlockInfo entries when a live range is discontinuous through a block. 2011-05-28 02:33:00 +00:00
SplitKit.h Create two BlockInfo entries when a live range is discontinuous through a block. 2011-05-28 02:33:00 +00:00
Splitter.cpp
Splitter.h
StackProtector.cpp Inline check that's used only once. 2011-03-29 17:12:55 +00:00
StackSlotColoring.cpp
StrongPHIElimination.cpp Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
TailDuplication.cpp Update comments. 2011-02-04 01:10:12 +00:00
TargetInstrInfoImpl.cpp Permit remat when a virtual register has multiple defs. 2011-04-20 22:14:17 +00:00
TargetLoweringObjectFileImpl.cpp Add the suffix to the Win64 EH data sections' names if given. Add a test for 2011-05-27 21:38:47 +00:00
TwoAddressInstructionPass.cpp Catch more cases where 2-address pass should 3-addressify instructions. rdar://9002648. 2011-03-02 01:08:17 +00:00
UnreachableBlockElim.cpp Fix PR10029 - VerifyCoalescing failure on patterns_dfa.c of 445.gobmk. 2011-05-27 05:04:51 +00:00
VirtRegMap.cpp Also count identity copies. 2011-05-06 17:59:57 +00:00
VirtRegMap.h This method belonged in VirtRegMap. 2011-02-19 00:38:43 +00:00
VirtRegRewriter.cpp Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
VirtRegRewriter.h

//===---------------------------------------------------------------------===//

Common register allocation / spilling problem:

        mul lr, r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        ldr r4, [sp, #+52]
        mla r4, r3, lr, r4

can be:

        mul lr, r4, lr
        mov r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

and then "merge" mul and mov:

        mul r4, r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

It also increase the likelihood the store may become dead.

//===---------------------------------------------------------------------===//

bb27 ...
        ...
        %reg1037 = ADDri %reg1039, 1
        %reg1038 = ADDrs %reg1032, %reg1039, %NOREG, 10
    Successors according to CFG: 0x8b03bf0 (#5)

bb76 (0x8b03bf0, LLVM BB @0x8b032d0, ID#5):
    Predecessors according to CFG: 0x8b0c5f0 (#3) 0x8b0a7c0 (#4)
        %reg1039 = PHI %reg1070, mbb<bb76.outer,0x8b0c5f0>, %reg1037, mbb<bb27,0x8b0a7c0>

Note ADDri is not a two-address instruction. However, its result %reg1037 is an
operand of the PHI node in bb76 and its operand %reg1039 is the result of the
PHI node. We should treat it as a two-address code and make sure the ADDri is
scheduled after any node that reads %reg1039.

//===---------------------------------------------------------------------===//

Use local info (i.e. register scavenger) to assign it a free register to allow
reuse:
        ldr r3, [sp, #+4]
        add r3, r3, #3
        ldr r2, [sp, #+8]
        add r2, r2, #2
        ldr r1, [sp, #+4]  <==
        add r1, r1, #1
        ldr r0, [sp, #+4]
        add r0, r0, #2

//===---------------------------------------------------------------------===//

LLVM aggressively lift CSE out of loop. Sometimes this can be negative side-
effects:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
load [i + R1]
...
load [i + R2]
...
load [i + R3]

Suppose there is high register pressure, R1, R2, R3, can be spilled. We need
to implement proper re-materialization to handle this:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
R1 = X + 4  @ re-materialized
load [i + R1]
...
R2 = X + 7 @ re-materialized
load [i + R2]
...
R3 = X + 15 @ re-materialized
load [i + R3]

Furthermore, with re-association, we can enable sharing:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
T = i + X
load [T + 4]
...
load [T + 7]
...
load [T + 15]
//===---------------------------------------------------------------------===//

It's not always a good idea to choose rematerialization over spilling. If all
the load / store instructions would be folded then spilling is cheaper because
it won't require new live intervals / registers. See 2003-05-31-LongShifts for
an example.

//===---------------------------------------------------------------------===//

With a copying garbage collector, derived pointers must not be retained across
collector safe points; the collector could move the objects and invalidate the
derived pointer. This is bad enough in the first place, but safe points can
crop up unpredictably. Consider:

        %array = load { i32, [0 x %obj] }** %array_addr
        %nth_el = getelementptr { i32, [0 x %obj] }* %array, i32 0, i32 %n
        %old = load %obj** %nth_el
        %z = div i64 %x, %y
        store %obj* %new, %obj** %nth_el

If the i64 division is lowered to a libcall, then a safe point will (must)
appear for the call site. If a collection occurs, %array and %nth_el no longer
point into the correct object.

The fix for this is to copy address calculations so that dependent pointers
are never live across safe point boundaries. But the loads cannot be copied
like this if there was an intervening store, so may be hard to get right.

Only a concurrent mutator can trigger a collection at the libcall safe point.
So single-threaded programs do not have this requirement, even with a copying
collector. Still, LLVM optimizations would probably undo a front-end's careful
work.

//===---------------------------------------------------------------------===//

The ocaml frametable structure supports liveness information. It would be good
to support it.

//===---------------------------------------------------------------------===//

The FIXME in ComputeCommonTailLength in BranchFolding.cpp needs to be
revisited. The check is there to work around a misuse of directives in inline
assembly.

//===---------------------------------------------------------------------===//

It would be good to detect collector/target compatibility instead of silently
doing the wrong thing.

//===---------------------------------------------------------------------===//

It would be really nice to be able to write patterns in .td files for copies,
which would eliminate a bunch of explicit predicates on them (e.g. no side 
effects).  Once this is in place, it would be even better to have tblgen 
synthesize the various copy insertion/inspection methods in TargetInstrInfo.

//===---------------------------------------------------------------------===//

Stack coloring improvements:

1. Do proper LiveStackAnalysis on all stack objects including those which are
   not spill slots.
2. Reorder objects to fill in gaps between objects.
   e.g. 4, 1, <gap>, 4, 1, 1, 1, <gap>, 4 => 4, 1, 1, 1, 1, 4, 4

//===---------------------------------------------------------------------===//

The scheduler should be able to sort nearby instructions by their address. For
example, in an expanded memset sequence it's not uncommon to see code like this:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

Each of the stores is independent, and the scheduler is currently making an
arbitrary decision about the order.

//===---------------------------------------------------------------------===//

Another opportunitiy in this code is that the $0 could be moved to a register:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

This would save substantial code size, especially for longer sequences like
this. It would be easy to have a rule telling isel to avoid matching MOV32mi
if the immediate has more than some fixed number of uses. It's more involved
to teach the register allocator how to do late folding to recover from
excessive register pressure.