Vikram S. Adve feb3298fca For instructions in a delay slot of another instruction, ... we no longer need to find the live-before set of the delayed branch since that set is now included the live-before/after set of the instructions in each delay slot. Just assert that instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7796 91177308-0d34-0410-b5e6-96231b3b80d8		2003-08-12 22:22:24 +00:00
..
CBackend	The HAVE_JUMP code is dead, these intrinsics should _never_ be expanded	2003-08-06 18:04:40 +00:00
SparcV9	For instructions in a delay slot of another instruction,	2003-08-12 22:22:24 +00:00
X86	Add basic support for 16 and 32 bit function arguments!	2003-08-11 21:30:00 +00:00
Makefile	X86 target builds fine now	2002-11-20 20:17:03 +00:00
MRegisterInfo.cpp	Make it easier to debug by exposing a temporary	2003-08-03 13:49:25 +00:00
Target.td	Rename DNVT_bool to DNVT_i1 to be consistent with type system	2003-08-12 04:28:21 +00:00
TargetData.cpp	Remove redundant const qualifiers from cast<> expressions	2003-07-23 15:30:06 +00:00
TargetInstrInfo.cpp	Nice tasty llc fixes. These should fix LLC for x86 for everything in	2003-06-27 00:00:48 +00:00
TargetMachine.cpp	The promotion rules are the same for all targets, they are set by the C standard.	2003-04-26 19:47:36 +00:00
TargetSchedInfo.cpp	Reformatted code to match the prevalent LLVM style; fit code into 80 columns.	2003-08-05 00:02:06 +00:00