Tilmann Scheller ffd0200abf Implement the SVR4 ABI for PowerPC. ... Implement LowerFORMAL_ARGUMENTS_SVR4(). Implement LowerCALL_SVR4(). Add support for split arguments. Implement by value parameter passing for aggregates. Add support for variable argument lists. Create the spill area for argument registers of variable argument functions no longer at a fixed offset. Make sure callee saved registers are spilled to the correct stack offsets. Change allocation order of non-volatile floating-point registers. Add VRSAVE to the list of callee-saved registers, add CallConvLowering for vararg calls. Add support for variable argument calls with Vector arguments. Add support for VR and VRSAVE save area, improve allocation order for non-volatile vector registers. Stop creating illegal i8 values in LowerVASTART(). Add memory access width hints. Make sure to reserve space on the stack for the frame pointer. When using the SVR4 ABI, reserve r13 for the Small Data Area pointer. Assure that the frame pointer is spilled to the correct location on the stack. Some FP registers were not marked as volatile. Make sure the i64 words from a long double are passed either both in registers or both on the stack. Only put integer arguments in registers which are not marked with the inreg flag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74765 91177308-0d34-0410-b5e6-96231b3b80d8		2009-07-03 06:45:56 +00:00
..
DarwinTargetAsmInfo.h	merge the common darwin settings from the X86/PPC/ARM targets	2009-06-19 00:08:39 +00:00
ELFTargetAsmInfo.h	Do not propagate ELF-specific stuff (data.rel) into other targets. This simplifies code and also ensures correctness.	2009-03-30 15:27:43 +00:00
SubtargetFeature.h	Propagate CPU string out of SubtargetFeatures	2009-05-23 19:50:50 +00:00
Target.td	implement support for lowering subregs when preparing to print	2009-06-20 07:03:18 +00:00
TargetAsmInfo.h	merge the common darwin settings from the X86/PPC/ARM targets	2009-06-19 00:08:39 +00:00
TargetCallingConv.td	Implement the SVR4 ABI for PowerPC.	2009-07-03 06:45:56 +00:00
TargetData.h	Clarify a comment.	2009-05-12 17:08:34 +00:00
TargetELFWriterInfo.h	Remove getFunctionAlignment from TargetELFInfo and use new MachineFunction alignment method	2009-07-02 02:13:13 +00:00
TargetFrameInfo.h
TargetInstrDesc.h	Add new TargetInstrDesc::hasImplicitUseOfPhysReg and	2009-04-12 07:26:51 +00:00
TargetInstrInfo.h	Move getInstrOperandRegClass from the scheduler to TargetInstrInfo.	2009-05-05 00:30:09 +00:00
TargetInstrItineraries.h
TargetIntrinsicInfo.h	Added support to have TableGen provide information if an intrinsic (core	2009-02-24 23:17:49 +00:00
TargetJITInfo.h	First patch in the direction of splitting MachineCodeEmitter in two subclasses:	2009-05-30 20:51:52 +00:00
TargetLowering.h	Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed arguments in a vararg call.	2009-07-03 06:44:53 +00:00
TargetMachine.h	Address more comments :)	2009-06-15 22:08:48 +00:00
TargetMachineRegistry.h
TargetMachOWriterInfo.h
TargetOptions.h	The attached patches implement most of the ARM AAPCS-VFP hard float	2009-06-08 22:53:56 +00:00
TargetRegisterInfo.h	- Update register allocation hint after coalescing. This is done by the target since the hint is target dependent. This is important for ARM register pair hints.	2009-06-18 02:04:01 +00:00
TargetSchedule.td
TargetSelect.h	Provide InitializeAllTargets and InitializeNativeTarget functions in the	2009-06-23 23:59:40 +00:00
TargetSelectionDAG.td	Make IntInits and ListInits typed. This helps deduce types of !if and	2009-06-08 20:23:18 +00:00
TargetSubtarget.h