More infrastructure required for the basic function which returns a constant integer.

This commit is contained in:
Jeremy Rand 2016-02-09 22:30:11 -05:00
parent 4fb15c1a07
commit 52705f393a
6 changed files with 65 additions and 9 deletions

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@ -53,7 +53,7 @@ Here are the steps to checkout the code and build it:
$ git clone https://github.com/jeremysrand/llvm-65816.git $ git clone https://github.com/jeremysrand/llvm-65816.git
$ mkdir build $ mkdir build
$ cd build $ cd build
$ cmake -G "Unix Makefiles" ../llvm-65816 $ cmake -DCMAKE_BUILD_TYPE:STRING=Debug -G "Unix Makefiles" ../llvm-65816
$ make $ make
That works for me on my Mac. Note, you probably need to download cmake. That works for me on my Mac. Note, you probably need to download cmake.

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@ -167,13 +167,13 @@ bool SparcDAGToDAGISel::SelectADDRrr(SDValue Addr, SDValue &R1, SDValue &R2) {
#endif #endif
SDNode *WDC65816DAGToDAGISel::Select(SDNode *N) { SDNode *WDC65816DAGToDAGISel::Select(SDNode *N) {
WDC_LOG("WDC_TODO - Unimplemented method called, opcode=" << N);
SDLoc dl(N); SDLoc dl(N);
if (N->isMachineOpcode()) { if (N->isMachineOpcode()) {
N->setNodeId(-1); N->setNodeId(-1);
return NULL; // Already selected. return NULL; // Already selected.
} }
WDC_LOG("WDC_TODO - Unimplemented method called, opcode=" << N->getOpcode());
switch (N->getOpcode()) { switch (N->getOpcode()) {
default: break; default: break;

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@ -810,12 +810,16 @@ static SPCC::CondCodes FPCondCCodeToFCC(ISD::CondCode CC) {
WDC65816TargetLowering::WDC65816TargetLowering(TargetMachine &TM) WDC65816TargetLowering::WDC65816TargetLowering(TargetMachine &TM)
: TargetLowering(TM, new TargetLoweringObjectFileELF()) { : TargetLowering(TM, new TargetLoweringObjectFileELF()) {
addRegisterClass(MVT::i16, &WDC::Int16RegsRegClass); addRegisterClass(MVT::i16, &WDC::AccRegsRegClass);
addRegisterClass(MVT::i16, &WDC::IndexXRegsRegClass);
addRegisterClass(MVT::i16, &WDC::IndexYRegsRegClass);
#if 0 // WDC_TODO - turn these off for now... #if 0 // WDC_TODO - turn these off for now...
// The problem here is that if LLVM thinks we have 32bit and 64bit registers // The problem here is that if LLVM thinks we have 32bit and 64bit registers
// then it insists on promoting ints to 32-bit even though we have said we are // then it insists on promoting ints to 32-bit even though we have said we are
// natively a 16-bit machine. Also, I haven't bothered to tell LLVM yet how to // natively a 16-bit machine. Also, I haven't bothered to tell LLVM yet how to
// load values into these registers which I think confuses it. So, off for now. // load values into these registers which I think confuses it. So, off for now.
addRegisterClass(MVT::i16, &WDC::Int16RegsRegClass);
addRegisterClass(MVT::i32, &WDC::Int32RegsRegClass); addRegisterClass(MVT::i32, &WDC::Int32RegsRegClass);
addRegisterClass(MVT::i64, &WDC::Int64RegsRegClass); addRegisterClass(MVT::i64, &WDC::Int64RegsRegClass);
addRegisterClass(MVT::f32, &WDC::Float32RegsRegClass); addRegisterClass(MVT::f32, &WDC::Float32RegsRegClass);

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@ -64,3 +64,49 @@ unsigned WDC65816InstrInfo::getGlobalBaseReg(MachineFunction *MF) const
return GlobalBaseReg; return GlobalBaseReg;
#endif #endif
} }
void WDC65816InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned SrcReg, bool isKill, int FrameIdx,
const TargetRegisterClass *RC,
const TargetRegisterInfo *TRI) const {
DebugLoc DL;
if (MI != MBB.end()) DL = MI->getDebugLoc();
MachineFunction &MF = *MBB.getParent();
MachineFrameInfo &MFI = *MF.getFrameInfo();
MachineMemOperand *MMO =
MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FrameIdx),
MachineMemOperand::MOStore,
MFI.getObjectSize(FrameIdx),
MFI.getObjectAlignment(FrameIdx));
if (RC == &WDC::AccRegsRegClass)
BuildMI(MBB, MI, DL, get(WDC::STAabsl))
.addFrameIndex(FrameIdx).addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
else
llvm_unreachable("Cannot store this register to stack slot!");
}
void WDC65816InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, int FrameIdx,
const TargetRegisterClass *RC,
const TargetRegisterInfo *TRI) const{
DebugLoc DL;
if (MI != MBB.end()) DL = MI->getDebugLoc();
MachineFunction &MF = *MBB.getParent();
MachineFrameInfo &MFI = *MF.getFrameInfo();
MachineMemOperand *MMO =
MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FrameIdx),
MachineMemOperand::MOLoad,
MFI.getObjectSize(FrameIdx),
MFI.getObjectAlignment(FrameIdx));
if (RC == &WDC::AccRegsRegClass)
BuildMI(MBB, MI, DL, get(WDC::LDAabsl))
.addReg(DestReg).addFrameIndex(FrameIdx).addMemOperand(MMO);
else
llvm_unreachable("Cannot store this register to stack slot!");
}

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@ -37,6 +37,18 @@ namespace llvm {
unsigned getGlobalBaseReg(MachineFunction *MF) const; unsigned getGlobalBaseReg(MachineFunction *MF) const;
virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned SrcReg, bool isKill,
int FrameIndex,
const TargetRegisterClass *RC,
const TargetRegisterInfo *TRI) const;
virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, int FrameIdx,
const TargetRegisterClass *RC,
const TargetRegisterInfo *TRI) const;
}; };
} }

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@ -30,12 +30,6 @@
using namespace llvm; using namespace llvm;
#if 0 // TODO - What is this?
static cl::opt<bool>
ReserveAppRegisters("sparc-reserve-app-registers", cl::Hidden, cl::init(false),
cl::desc("Reserve application registers (%g2-%g4)"));
#endif
WDC65816RegisterInfo::WDC65816RegisterInfo(WDC65816Subtarget &st) WDC65816RegisterInfo::WDC65816RegisterInfo(WDC65816Subtarget &st)
: WDC65816GenRegisterInfo(WDC::P), Subtarget(st) { : WDC65816GenRegisterInfo(WDC::P), Subtarget(st) {
} }