Disable the fake direct page registers which are wider than 16-bits for now to workaround a problem. LLVM seems to promote everything to 32-bit if you say the machine has 32-bit or better registers even if I have indicated that the native bit width is 16. Disabling these gets me one step closer to my first successful compile.
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@ -811,10 +811,16 @@ WDC65816TargetLowering::WDC65816TargetLowering(TargetMachine &TM)
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: TargetLowering(TM, new TargetLoweringObjectFileELF()) {
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addRegisterClass(MVT::i16, &WDC::Int16RegsRegClass);
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#if 0 // WDC_TODO - turn these off for now...
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// The problem here is that if LLVM thinks we have 32bit and 64bit registers
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// then it insists on promoting ints to 32-bit even though we have said we are
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// natively a 16-bit machine. Also, I haven't bothered to tell LLVM yet how to
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// load values into these registers which I think confuses it. So, off for now.
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addRegisterClass(MVT::i32, &WDC::Int32RegsRegClass);
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addRegisterClass(MVT::i64, &WDC::Int64RegsRegClass);
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addRegisterClass(MVT::f32, &WDC::Float32RegsRegClass);
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addRegisterClass(MVT::f64, &WDC::Float64RegsRegClass);
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#endif
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computeRegisterProperties();
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#if 0 // WDC_TODO - For sure we need something here...
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@ -37,7 +37,7 @@ namespace llvm {
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bool is64Bit() const { return false; }
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std::string getDataLayout() const {
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return std::string("e-p:32:8:8-i16:8:8-f32:8:8-f68:8:8-n16");
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return std::string("e-p:32:8:8-i8:8:8-i16:8:8-i32:8:8-f32:8:8-f64:8:8-n16:8");
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}
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#if 0 // WDC_TODO - do I need any of this?
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