mirror of
https://github.com/mre/mos6502.git
synced 2024-11-25 02:33:26 +00:00
remove memory.get_slice
real hardware won't have the ability to dive in and grab a slice from memory
This commit is contained in:
parent
4254c02f55
commit
f3f15de8cc
16
src/cpu.rs
16
src/cpu.rs
@ -63,8 +63,20 @@ impl CPU {
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let data_start = self.registers.program_counter.wrapping_add(1);
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let data_start = self.registers.program_counter.wrapping_add(1);
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let slice = self.memory.get_slice(data_start, extra_bytes);
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let slice = if extra_bytes == 0 {
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let am_out = am.process(self, slice);
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[0, 0]
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} else if extra_bytes == 1 {
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[self.memory.get_byte(data_start), 0]
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} else if extra_bytes == 2 {
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[
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self.memory.get_byte(data_start),
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self.memory.get_byte(data_start.wrapping_add(1)),
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]
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} else {
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panic!()
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};
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let am_out = am.process(self, &slice[..extra_bytes as usize]);
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// Increment program counter
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// Increment program counter
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self.registers.program_counter =
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self.registers.program_counter =
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@ -26,6 +26,7 @@
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// POSSIBILITY OF SUCH DAMAGE.
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// POSSIBILITY OF SUCH DAMAGE.
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use crate::cpu::CPU;
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use crate::cpu::CPU;
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use crate::memory::Memory;
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// Abbreviations
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// Abbreviations
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//
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//
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@ -171,6 +172,12 @@ impl AddressingMode {
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let memory = &cpu.memory;
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let memory = &cpu.memory;
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fn read_address(mem: &Memory, addr: u16) -> [u8; 2] {
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let lo = mem.get_byte(addr);
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let hi = mem.get_byte(addr.wrapping_add(1));
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[lo, hi]
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}
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match self {
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match self {
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AddressingMode::Accumulator | AddressingMode::Implied => {
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AddressingMode::Accumulator | AddressingMode::Implied => {
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// Always the same -- no input
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// Always the same -- no input
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@ -227,8 +234,8 @@ impl AddressingMode {
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// Use [u8, ..2] from instruction as an address. Interpret the
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// Use [u8, ..2] from instruction as an address. Interpret the
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// two bytes starting at that address as an address.
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// two bytes starting at that address as an address.
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// (Output: a 16-bit address)
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// (Output: a 16-bit address)
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let slice = memory.get_slice(arr_to_addr(arr), 2);
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let slice = read_address(memory, arr_to_addr(arr));
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OpInput::UseAddress(arr_to_addr(slice))
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OpInput::UseAddress(arr_to_addr(&slice))
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}
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}
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AddressingMode::IndexedIndirectX => {
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AddressingMode::IndexedIndirectX => {
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// Use [u8, ..1] from instruction
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// Use [u8, ..1] from instruction
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@ -236,8 +243,8 @@ impl AddressingMode {
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// This is where the absolute (16-bit) target address is stored.
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// This is where the absolute (16-bit) target address is stored.
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// (Output: a 16-bit address)
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// (Output: a 16-bit address)
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let start = arr[0].wrapping_add(x);
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let start = arr[0].wrapping_add(x);
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let slice = memory.get_slice(u16::from(start), 2);
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let slice = read_address(memory, u16::from(start));
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OpInput::UseAddress(arr_to_addr(slice))
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OpInput::UseAddress(arr_to_addr(&slice))
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}
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}
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AddressingMode::IndirectIndexedY => {
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AddressingMode::IndirectIndexedY => {
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// Use [u8, ..1] from instruction
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// Use [u8, ..1] from instruction
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@ -245,8 +252,8 @@ impl AddressingMode {
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// Add Y register to this address to get the final address
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// Add Y register to this address to get the final address
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// (Output: a 16-bit address)
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// (Output: a 16-bit address)
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let start = arr[0];
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let start = arr[0];
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let slice = memory.get_slice(u16::from(start), 2);
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let slice = read_address(memory, u16::from(start));
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OpInput::UseAddress(arr_to_addr(slice).wrapping_add(xextend(y)))
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OpInput::UseAddress(arr_to_addr(&slice).wrapping_add(xextend(y)))
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}
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}
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}
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}
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}
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}
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@ -69,13 +69,6 @@ impl Memory {
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self.bytes[address as usize]
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self.bytes[address as usize]
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}
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}
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pub fn get_slice(&self, start: u16, diff: u16) -> &[u8] {
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let orig: usize = start.into();
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let end = orig + diff as usize;
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&self.bytes[orig..end]
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}
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// Sets the byte at the given address to the given value and returns the
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// Sets the byte at the given address to the given value and returns the
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// previous value at the address.
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// previous value at the address.
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pub fn set_byte(&mut self, address: u16, value: u8) -> u8 {
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pub fn set_byte(&mut self, address: u16, value: u8) -> u8 {
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