1
0
mirror of https://github.com/mre/mos6502.git synced 2024-11-24 11:31:00 +00:00

remove memory.get_slice

real hardware won't have the ability to dive in and grab a slice from
memory
This commit is contained in:
Sam M W 2023-04-03 05:47:29 +01:00
parent 4254c02f55
commit f3f15de8cc
3 changed files with 27 additions and 15 deletions

View File

@ -63,8 +63,20 @@ impl CPU {
let data_start = self.registers.program_counter.wrapping_add(1); let data_start = self.registers.program_counter.wrapping_add(1);
let slice = self.memory.get_slice(data_start, extra_bytes); let slice = if extra_bytes == 0 {
let am_out = am.process(self, slice); [0, 0]
} else if extra_bytes == 1 {
[self.memory.get_byte(data_start), 0]
} else if extra_bytes == 2 {
[
self.memory.get_byte(data_start),
self.memory.get_byte(data_start.wrapping_add(1)),
]
} else {
panic!()
};
let am_out = am.process(self, &slice[..extra_bytes as usize]);
// Increment program counter // Increment program counter
self.registers.program_counter = self.registers.program_counter =

View File

@ -26,6 +26,7 @@
// POSSIBILITY OF SUCH DAMAGE. // POSSIBILITY OF SUCH DAMAGE.
use crate::cpu::CPU; use crate::cpu::CPU;
use crate::memory::Memory;
// Abbreviations // Abbreviations
// //
@ -171,6 +172,12 @@ impl AddressingMode {
let memory = &cpu.memory; let memory = &cpu.memory;
fn read_address(mem: &Memory, addr: u16) -> [u8; 2] {
let lo = mem.get_byte(addr);
let hi = mem.get_byte(addr.wrapping_add(1));
[lo, hi]
}
match self { match self {
AddressingMode::Accumulator | AddressingMode::Implied => { AddressingMode::Accumulator | AddressingMode::Implied => {
// Always the same -- no input // Always the same -- no input
@ -227,8 +234,8 @@ impl AddressingMode {
// Use [u8, ..2] from instruction as an address. Interpret the // Use [u8, ..2] from instruction as an address. Interpret the
// two bytes starting at that address as an address. // two bytes starting at that address as an address.
// (Output: a 16-bit address) // (Output: a 16-bit address)
let slice = memory.get_slice(arr_to_addr(arr), 2); let slice = read_address(memory, arr_to_addr(arr));
OpInput::UseAddress(arr_to_addr(slice)) OpInput::UseAddress(arr_to_addr(&slice))
} }
AddressingMode::IndexedIndirectX => { AddressingMode::IndexedIndirectX => {
// Use [u8, ..1] from instruction // Use [u8, ..1] from instruction
@ -236,8 +243,8 @@ impl AddressingMode {
// This is where the absolute (16-bit) target address is stored. // This is where the absolute (16-bit) target address is stored.
// (Output: a 16-bit address) // (Output: a 16-bit address)
let start = arr[0].wrapping_add(x); let start = arr[0].wrapping_add(x);
let slice = memory.get_slice(u16::from(start), 2); let slice = read_address(memory, u16::from(start));
OpInput::UseAddress(arr_to_addr(slice)) OpInput::UseAddress(arr_to_addr(&slice))
} }
AddressingMode::IndirectIndexedY => { AddressingMode::IndirectIndexedY => {
// Use [u8, ..1] from instruction // Use [u8, ..1] from instruction
@ -245,8 +252,8 @@ impl AddressingMode {
// Add Y register to this address to get the final address // Add Y register to this address to get the final address
// (Output: a 16-bit address) // (Output: a 16-bit address)
let start = arr[0]; let start = arr[0];
let slice = memory.get_slice(u16::from(start), 2); let slice = read_address(memory, u16::from(start));
OpInput::UseAddress(arr_to_addr(slice).wrapping_add(xextend(y))) OpInput::UseAddress(arr_to_addr(&slice).wrapping_add(xextend(y)))
} }
} }
} }

View File

@ -69,13 +69,6 @@ impl Memory {
self.bytes[address as usize] self.bytes[address as usize]
} }
pub fn get_slice(&self, start: u16, diff: u16) -> &[u8] {
let orig: usize = start.into();
let end = orig + diff as usize;
&self.bytes[orig..end]
}
// Sets the byte at the given address to the given value and returns the // Sets the byte at the given address to the given value and returns the
// previous value at the address. // previous value at the address.
pub fn set_byte(&mut self, address: u16, value: u8) -> u8 { pub fn set_byte(&mut self, address: u16, value: u8) -> u8 {