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177 Commits

Author SHA1 Message Date
omarandlorraine
849f891e24
Merge pull request #67 from mre/rts 
Implementation of RTS
 2023-04-16 07:08:25 +01:00
Sam M W
bd1ab13dc1 point INY instruction at the correct register 2023-04-15 21:47:17 +01:00
Sam M W
f0fc9829db PLA opcode should update the flags 2023-04-15 21:44:05 +01:00
Sam M W
26a2f51bc6 don't overshoot the stack pointer! (pla and plp) 2023-04-15 21:37:47 +01:00
Sam M W
62424070a1 disable interrupts after BRK instruction 2023-04-15 21:34:07 +01:00
Sam M W
a8d53f926d implement BRK 2023-04-15 21:17:28 +01:00
Sam M W
1c31a73a2b correct endianness for program counter push 2023-04-15 21:01:08 +01:00
Sam M W
239992ea6c first stab at implementing the JSR instruction 2023-04-15 20:58:31 +01:00
Sam M W
70e85a2eaf bugfix for the bit opcode 2023-04-15 16:42:05 +01:00
Sam M W
8e797b70fa implement BNE 2023-04-15 16:17:51 +01:00
Sam M W
18164c7abf implement RTI as well 2023-04-15 15:36:53 +01:00
Sam M W
1b90243738 implementation of RTS 2023-04-15 15:36:43 +01:00
Sam M W
9f75d1a6b5 the get_byte method needs to take mutable reference to self 
the reson for this is it's possible for external hardware to have some
side effect on a read.
 2023-04-03 22:46:46 +01:00
Sam M W
26926a9feb set_byte method does not need to return old_value 2023-04-03 22:44:02 +01:00
Sam M W
d2043dc6fb less verbosity, more expliciteness 2023-04-03 21:07:06 +01:00
Sam M W
7222388c5e get rid of silly xextend function; just use the .into() 2023-04-03 21:00:17 +01:00
Sam M W
3accd8ce40 as clippy suggests, convert from bool to u8/i8 2023-04-03 07:39:30 +01:00
Sam M W
672defd817 remove now dead code 2023-04-03 07:39:30 +01:00
Sam M W
0708a1084c fix the tests back up 2023-04-03 07:39:18 +01:00
Sam M W
12c901e8aa generic argument for CPU represents memory 2023-04-03 07:02:32 +01:00
Sam M W
a8dac6e805 extract memory functionality into a trait 2023-04-03 06:59:40 +01:00
Sam M W
f3f15de8cc remove memory.get_slice 
real hardware won't have the ability to dive in and grab a slice from
memory
 2023-04-03 05:50:13 +01:00
Sam M W
4254c02f55 Remove unit test test_memory_set_bytes 
This is the right thing to do because its pass depends on
zero-initilization. Real memory will not behave this way
 2023-04-03 05:50:13 +01:00
Sam M W
131b0f312d remove get_byte_mut_ref method from Memory 
This is the right thing to do, because the actual hardware will perform
a read and then perform a write. This could have observable side effects
on a real system
 2023-04-03 05:50:06 +01:00
Sam M W
766143d52f remove is_stack_address; it's never used 2023-04-02 21:21:46 +01:00
omarandlorraine
61b8dfe1f2
add single_step function (#62) 
Co-authored-by: Sam M W <you@example.com>
 2023-03-27 00:27:44 +02:00
dependabot[bot]
fdf71425d3
Bump bitflags from 1.3.2 to 2.0.2 (#60) 
* Bump bitflags from 1.3.2 to 2.0.2

Bumps [bitflags](https://github.com/bitflags/bitflags) from 1.3.2 to 2.0.2.
- [Release notes](https://github.com/bitflags/bitflags/releases)
- [Changelog](https://github.com/bitflags/bitflags/blob/main/CHANGELOG.md)
- [Commits](https://github.com/bitflags/bitflags/compare/1.3.2...2.0.2)

---
updated-dependencies:
- dependency-name: bitflags
  dependency-type: direct:production
  update-type: version-update:semver-major
...

Signed-off-by: dependabot[bot] <support@github.com>

* Derive `Copy` and other traits for `Status`

---------

Signed-off-by: dependabot[bot] <support@github.com>
Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com>
Co-authored-by: Matthias <matthias-endler@gmx.net>
 2023-03-20 14:58:45 +01:00
Matthias Endler
c3438c14e7
Make code more idiomatic (#61) 2023-03-20 14:11:44 +01:00
Sam M W
c2e77b5f52 also test subtractions 2022-10-23 07:05:08 +01:00
Sam M W
2bcbfa63b5 fix panic 2022-10-23 07:05:04 +01:00
Sam M W
bf543e2fbe add failing test 2022-10-23 07:04:52 +01:00
Sam M W
11e48c1691 add missing CLI instruction 2022-10-22 12:26:03 +01:00
omarandlorraine
32f925feb2
Merge branch 'master' into incdec 2022-10-21 09:10:18 +01:00
Sam M W
f821dce70f do increments in the same way 2022-10-21 06:45:40 +01:00
Sam M W
e4aebb9dfe cargo fmt 2022-10-21 06:42:27 +01:00
Sam M W
4e057a2a94 remove unused function decrement_memory 2022-10-21 06:40:56 +01:00
Sam M W
1d0fd6aad0 remove unused function dec_x 2022-10-21 06:37:41 +01:00
Sam M W
7500e8816e cargo clippy --fix 2022-10-21 06:34:42 +01:00
Sam M W
95731752ba using the associated function decrement 2022-10-21 06:33:51 +01:00
Sam M W
665ee4193d x and y are now unsigned and there's less casting all over 2022-10-20 09:42:17 +01:00
Sam M W
41b9b19be2 decrement_y_test passes 2022-10-20 09:32:51 +01:00
Sam M W
c406965560 decrement_x_test passes 2022-10-20 09:23:58 +01:00
Sam M W
1972a42adc some failing tests 2022-10-20 09:04:44 +01:00
Sam M W
894e4304ea test branch_across_end_of_address_space 2022-10-18 14:55:22 +01:00
Sam M W
d8a9558095 formatting 2022-10-18 13:37:06 +01:00
Sam M W
5290a9d61e zeropage wraparound test 2022-10-18 13:35:17 +01:00
Sam M W
89d6e66e11 whitespace 2022-10-18 10:39:29 +01:00
Sam M W
cd83ae7b9c delete now useless sourcefile src/address.rs 2022-10-18 10:10:45 +01:00
Sam M W
8c6591f6a4 remove last of Address and AddressDiff 2022-10-18 10:10:38 +01:00
Sam M W
3de8f9158d move tests and README away from Address 2022-10-18 10:01:55 +01:00