6502
/
ossc
mirror of https://github.com/marqs85/ossc.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Merge branch 'release' of https://github.com/marqs85/ossc into upstream

This commit is contained in:
borti4938 2018-03-06 09:41:59 +01:00
parent d7ee965d89 bc1b7419f2
commit 10eff56f28
10 changed files with 40 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
ossc.qsf
View File

@ -227,7 +227,7 @@ set_global_assignment -name AUTO_RAM_TO_LCELL_CONVERSION ON
set_global_assignment -name MAX_RAM_BLOCKS_M4K 56
set_global_assignment -name FITTER_EFFORT "AUTO FIT"
set_global_assignment -name SEED 2
set_global_assignment -name SEED 20
set_global_assignment -name VERILOG_FILE rtl/videogen.v

3
software/sys_controller/ossc/av_controller.c
View File

@ -350,6 +350,9 @@ status_t get_status(tvp_input_t input, video_format format)
#endif
(tc.audio_swap_lr != cm.cc.audio_swap_lr))
SetupAudio(tc.tx_mode);
if (pcm1862_active && (tc.audio_gain != cm.cc.audio_gain))
pcm_set_gain(tc.audio_gain-AUDIO_GAIN_0DB);
#endif
cm.cc = tc;

1
software/sys_controller/ossc/avconfig.c
View File

@ -57,6 +57,7 @@ const avconfig_t tc_default = {
#ifdef ENABLE_AUDIO
.audio_dw_sampl = DEFAULT_ON,
.tx_mode = TX_HDMI,
.audio_gain = AUDIO_GAIN_0DB,
#endif
.col = {
.r_f_gain = DEFAULT_FINE_GAIN,

6
software/sys_controller/ossc/avconfig.h
View File

@ -39,6 +39,11 @@
#define SL_MODE_MAX 2
#define SL_TYPE_MAX 2
#define AUDIO_GAIN_M12DB 0
#define AUDIO_GAIN_0DB 12
#define AUDIO_GAIN_12DB 24
#define AUDIO_GAIN_MAX AUDIO_GAIN_12DB
#define L5FMT_1920x1080 0
#define L5FMT_1600x1200 1
#define L5FMT_1920x1200 2
@ -85,6 +90,7 @@ typedef struct {
#ifdef ENABLE_AUDIO
alt_u8 audio_dw_sampl;
alt_u8 audio_swap_lr;
alt_u8 audio_gain;
#endif
color_setup_t col;
} __attribute__((packed)) avconfig_t;

2
software/sys_controller/ossc/menu.c
View File

@ -76,6 +76,7 @@ static void lines_disp(alt_u8 v) { sniprintf(menu_row2, LCD_ROW_LEN+1, LNG("%u l
static void pixels_disp(alt_u8 v) { sniprintf(menu_row2, LCD_ROW_LEN+1, LNG("%u pixels","%u ﾄﾞｯﾄ"), v); }
static void value_disp(alt_u8 v) { sniprintf(menu_row2, LCD_ROW_LEN+1, " %u", v); }
static void lt_disp(alt_u8 v) { strncpy(menu_row2, lt_desc[v], LCD_ROW_LEN+1); }
static void aud_db_disp(alt_u8 v) { sniprintf(menu_row2, LCD_ROW_LEN+1, "%d dB", ((alt_8)v-AUDIO_GAIN_0DB)); }
static void vm_display_name (alt_u8 v) { strncpy(menu_row2, video_modes[v].name, LCD_ROW_LEN+1); }
static const arg_info_t vm_arg_info = {&vm_sel, VIDEO_MODES_CNT-1, vm_display_name};
@ -161,6 +162,7 @@ MENU(menu_compatibility, P99_PROTECT({ \
MENU(menu_audio, P99_PROTECT({ \
{ LNG("Down-sampling","ﾀﾞｳﾝｻﾝﾌﾟﾘﾝｸﾞ"), OPT_AVCONFIG_SELECTION, { .sel = { &tc.audio_dw_sampl, OPT_WRAP, SETTING_ITEM(audio_dw_sampl_desc) } } },
{ LNG("Swap left/right","ﾋﾀﾞﾘ/ﾐｷﾞｽﾜｯﾌﾟ"), OPT_AVCONFIG_SELECTION, { .sel = { &tc.audio_swap_lr, OPT_WRAP, SETTING_ITEM(off_on_desc) } } },
{ "Pre-ADC gain", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.audio_gain, OPT_NOWRAP, 0, AUDIO_GAIN_MAX, aud_db_disp } } },
}))
#define AUDIO_MENU { LNG("Audio options >","ｵｰﾃﾞｨｵｵﾌﾟｼｮﾝ >"), OPT_SUBMENU, { .sub = { &menu_audio, NULL, NULL } } },
#else

13
software/sys_controller/pcm1862/pcm1862.c
View File

@ -48,6 +48,13 @@ void pcm_source_sel(pcm_input_t input) {
pcm1862_writereg(PCM1862_ADC1R, adc_ch);
}
void pcm_set_gain(alt_8 db_gain) {
alt_8 gain_val = 2*db_gain;
pcm1862_writereg(PCM1862_PGA1L, gain_val);
pcm1862_writereg(PCM1862_PGA1R, gain_val);
}
int pcm1862_init()
{
if (pcm1862_readreg(0x05) != 0x86)
@ -56,5 +63,11 @@ int pcm1862_init()
//pcm1862_writereg(0x00, 0xff);
pcm1862_writereg(PCM1862_CLKCONFIG, 0x90);
pcm1862_writereg(PCM1862_DSP1_CLKDIV, 0x00);
pcm1862_writereg(PCM1862_DSP2_CLKDIV, 0x00);
pcm1862_writereg(PCM1862_ADC_CLKDIV, 0x03);
pcm1862_writereg(PCM1862_PLLCONFIG, 0x00);
pcm1862_writereg(PCM1862_DSP_CTRL, 0x30);
return 1;
}

4
software/sys_controller/pcm1862/pcm1862.h
View File

@ -30,7 +30,9 @@ typedef enum {
PCM_INPUT4 = 3
} pcm_input_t;
void pcm_source_sel(pcm_input_t input) ;
void pcm_source_sel(pcm_input_t input);
void pcm_set_gain(alt_8 db_gain);
int pcm1862_init();

7
software/sys_controller/pcm1862/pcm1862_regs.h
View File

@ -47,5 +47,12 @@
#define PCM1862_DIN_RESAMPLE 0x1B
#define PCM1862_CLKCONFIG 0x20
#define PCM1862_DSP1_CLKDIV 0x21
#define PCM1862_DSP2_CLKDIV 0x22
#define PCM1862_ADC_CLKDIV 0x23
#define PCM1862_PLLCONFIG 0x28
#define PCM1862_DSP_CTRL 0x71
#endif /* PCM1862_REGS_H_ */

4
software/sys_controller_bsp/settings.bsp
View File

@ -2,8 +2,8 @@
<sch:Settings xmlns:sch="http://www.altera.com/embeddedsw/bsp/schema">
<BspType>hal</BspType>
<BspVersion>default</BspVersion>
<BspGeneratedTimeStamp>Dec 7, 2017 9:34:03 PM</BspGeneratedTimeStamp>
<BspGeneratedUnixTimeStamp>1512675243152</BspGeneratedUnixTimeStamp>
<BspGeneratedTimeStamp>Feb 24, 2018 7:18:24 PM</BspGeneratedTimeStamp>
<BspGeneratedUnixTimeStamp>1519492704534</BspGeneratedUnixTimeStamp>
<BspGeneratedLocation>./</BspGeneratedLocation>
<BspSettingsFile>settings.bsp</BspSettingsFile>
<SopcDesignFile>../../sys.sopcinfo</SopcDesignFile>

4
sys.sopcinfo
View File

@ -1,11 +1,11 @@
<?xml version="1.0" encoding="UTF-8"?>
<EnsembleReport name="sys" kind="sys" version="1.0" fabric="QSYS">
<!-- Format version 17.1 590 (Future versions may contain additional information.) -->
<!-- 2018.01.20.21:54:44 -->
<!-- 2018.02.24.18:26:12 -->
<!-- A collection of modules and connections -->
<parameter name="AUTO_GENERATION_ID">
<type>java.lang.Integer</type>
<value>1516481684</value>
<value>1519489572</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>