mirror of https://github.com/marqs85/ossc.git
Merge branch 'eatnumber1-psp-line3x' into release
This commit is contained in:
marqs
commit
2823ab9f8b
14
ossc.qsf
14
ossc.qsf
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@ -240,4 +240,18 @@ set_global_assignment -name SDC_FILE ossc.sdc
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set_global_assignment -name CDF_FILE output_files/Chain1.cdf
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set_global_assignment -name SIGNALTAP_FILE output_files/ossc_la.stp
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set_global_assignment -name QIP_FILE rtl/char_array.qip
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set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_DE
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set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_HS
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set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_PCLK
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set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_VS
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set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_BD
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set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_GD
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set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_RD
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_DE
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_HS
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_PCLK
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_VS
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_BD
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_GD
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_RD
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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8
ossc.sdc
8
ossc.sdc
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@ -10,8 +10,8 @@ set_false_path -to {sys:sys_inst|sys_pio_1:pio_1|readdata*}
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### Scanconverter clock constraints ###
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create_clock -period 108MHz -name pclk_1x [get_ports PCLK_in]
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create_clock -period 33MHz -name pclk_2x_source [get_ports PCLK_in] -add
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create_clock -period 33MHz -name pclk_3x_source [get_ports PCLK_in] -add
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create_clock -period 54MHz -name pclk_2x_source [get_ports PCLK_in] -add
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create_clock -period 54MHz -name pclk_3x_source [get_ports PCLK_in] -add
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create_clock -period 33MHz -name pclk_4x_source [get_ports PCLK_in] -add
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create_clock -period 33MHz -name pclk_5x_source [get_ports PCLK_in] -add
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@ -54,8 +54,8 @@ foreach_in_collection c [get_clocks "pclk_1x pclk_*_source"] {
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}
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# output delay constraints
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set IT_Tsu 1.0
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set IT_Th -0.5
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set IT_Tsu 1.5
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set IT_Th -0.3
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set critoutputs_hdmi [get_ports {HDMI_TX_RD* HDMI_TX_GD* HDMI_TX_BD* HDMI_TX_DE HDMI_TX_HS HDMI_TX_VS}]
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foreach_in_collection c [get_clocks pclk_*_out] {
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set_output_delay -clock $c -min $IT_Th $critoutputs_hdmi -add
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File diff suppressed because it is too large
Load Diff
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@ -65,7 +65,7 @@ static const char *l5_fmt_desc[] = { "1920x1080", "1600x1200", "1920x1200" };
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static const char *pm_240p_desc[] = { LNG("Passthru","ﾊﾟｽｽﾙｰ"), "Line2x", "Line3x", "Line4x", "Line5x" };
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static const char *pm_480i_desc[] = { LNG("Passthru","ﾊﾟｽｽﾙｰ"), "Line2x (bob)", "Line3x (laced)", "Line4x (bob)" };
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static const char *pm_384p_desc[] = { LNG("Passthru","ﾊﾟｽｽﾙｰ"), "Line2x", "Line2x 240x360", "Line3x 240x360", "Line3x Generic" };
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static const char *pm_480p_desc[] = { LNG("Passthru","ﾊﾟｽｽﾙｰ"), "Line2x" };
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static const char *pm_480p_desc[] = { LNG("Passthru","ﾊﾟｽｽﾙｰ"), "Line2x", "Line3x 480x272" };
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static const char *pm_1080i_desc[] = { LNG("Passthru","ﾊﾟｽｽﾙｰ"), "Line2x (bob)" };
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static const char *ar_256col_desc[] = { "4:3", "8:7" };
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static const char *tx_mode_desc[] = { "HDMI (RGB)", "HDMI (YCbCr444)", "DVI" };
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@ -91,8 +91,9 @@ alt_8 get_mode_id(alt_u32 totlines, alt_u8 progressive, alt_u32 hz, video_type t
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case 2: // VESA 640x480@60
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continue;
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case 3: // PSP 480x272
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// force optimized Line2x mode for 480x272
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// force optimized Line2x/3x mode for 480x272
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valid_lm[1] = MODE_L2_480x272;
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valid_lm[2] = MODE_L3_480x272;
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break;
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}
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} else { // "640x480" on the list
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@ -229,6 +230,15 @@ alt_8 get_mode_id(alt_u32 totlines, alt_u8 progressive, alt_u32 hz, video_type t
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cm.sample_mult = 7;
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cm.hsync_cut = 13;
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break;
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case MODE_L3_480x272:
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cm.fpga_vmultmode = FPGA_V_MULTMODE_3X;
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cm.fpga_hmultmode = FPGA_H_MULTMODE_OPTIMIZED;
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if (cm.cc.upsample2x) {
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cm.sample_mult = 2;
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} else {
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cm.tx_pixelrep = TX_PIXELREP_2X;
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}
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break;
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case MODE_L4_GEN_4_3:
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cm.fpga_vmultmode = FPGA_V_MULTMODE_4X;
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cm.fpga_hmultmode = FPGA_H_MULTMODE_FULLWIDTH;
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@ -83,16 +83,17 @@ typedef enum {
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MODE_L3_320_COL = (1<<14),
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MODE_L3_256_COL = (1<<15),
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MODE_L3_240x360 = (1<<16),
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MODE_L4_GEN_4_3 = (1<<17),
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MODE_L4_512_COL = (1<<18),
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MODE_L4_384_COL = (1<<19),
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MODE_L4_320_COL = (1<<20),
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MODE_L4_256_COL = (1<<21),
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MODE_L5_GEN_4_3 = (1<<22),
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MODE_L5_512_COL = (1<<23),
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MODE_L5_384_COL = (1<<24),
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MODE_L5_320_COL = (1<<25),
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MODE_L5_256_COL = (1<<26),
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MODE_L3_480x272 = (1<<17),
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MODE_L4_GEN_4_3 = (1<<18),
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MODE_L4_512_COL = (1<<19),
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MODE_L4_384_COL = (1<<20),
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MODE_L4_320_COL = (1<<21),
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MODE_L4_256_COL = (1<<22),
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MODE_L5_GEN_4_3 = (1<<23),
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MODE_L5_512_COL = (1<<24),
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MODE_L5_384_COL = (1<<25),
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MODE_L5_320_COL = (1<<26),
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MODE_L5_256_COL = (1<<27),
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} mode_flags;
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typedef struct {
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@ -150,7 +151,7 @@ typedef struct {
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{ "480i", HDMI_480i60, 720, 240, 858, 0, 525, 57, 15, 62, 3, DEFAULT_SAMPLER_PHASE, (VIDEO_SDTV | VIDEO_PC), GROUP_480I, (MODE_PT | MODE_L2 | MODE_L3_GEN_16_9 | MODE_L4_GEN_4_3 | MODE_PLLDIVBY2 | MODE_INTERLACED) }, \
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{ "480p", HDMI_480p60, 720, 480, 858, 0, 525, 60, 30, 62, 6, DEFAULT_SAMPLER_PHASE, (VIDEO_EDTV | VIDEO_PC), GROUP_480P, (MODE_PT | MODE_L2) }, \
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/* 480p PSP in-game */ \
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{ "480x272", HDMI_480p60_16x9, 480, 272, 858, 0, 525, 177,134, 62, 6, DEFAULT_SAMPLER_PHASE, (VIDEO_EDTV), GROUP_480P, (MODE_PT | MODE_L2_480x272) }, \
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{ "480x272", HDMI_480p60_16x9, 480, 272, 858, 0, 525, 177,134, 62, 6, DEFAULT_SAMPLER_PHASE, (VIDEO_EDTV), GROUP_480P, (MODE_PT | MODE_L2_480x272 | MODE_L3_480x272) }, \
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{ "640x480", HDMI_640x480p60, 640, 480, 800, 0, 525, 48, 33, 96, 2, DEFAULT_SAMPLER_PHASE, (VIDEO_PC | VIDEO_EDTV), GROUP_480P, (MODE_PT | MODE_L2) }, \
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/* X68k @ 31kHz */ \
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{ "640x512", HDMI_Unknown, 640, 512, 800, 0, 568, 48, 28, 96, 2, DEFAULT_SAMPLER_PHASE, (VIDEO_PC | VIDEO_EDTV), GROUP_480P, (MODE_PT | MODE_L2) }, \
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@ -0,0 +1,23 @@
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.PHONY: generate_hex update_mif generate_firmware assemble_ossc
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all: generate_firmware
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generate_hex: bin2hex
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$(MAKE) -C ../software/sys_controller generate_hex
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update_mif: generate_hex
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cd .. && quartus_cdb ossc --update_mif
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assemble_ossc: update_mif
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cd .. && quartus_asm ossc
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generate_firmware: assemble_ossc create_fw_img
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./create_fw_img ../output_files/ossc.rbf 0.86 aud-psp
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bin2hex: bin2hex.c
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$(CC) bin2hex.c -o bin2hex
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create_fw_img: create_fw_img.c
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gcc create_fw_img.c -o create_fw_img
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# vim: set noet ts=2 sw=2 sts=2
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