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switch to RV32E
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@ -26,11 +26,11 @@ Architecture
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SW toolchain build procedure
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--------------------------
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1. Download, configure, build and install RISC-V toolchain with Newlib + multilib support:
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1. Download, configure, build and install RISC-V toolchain with Newlib + RV32EMC support:
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~~~~
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git clone --recursive https://github.com/riscv/riscv-gnu-toolchain
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cd riscv-gnu-toolchain
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./configure --prefix=/opt/riscv --enable-multilib
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./configure --prefix=/opt/riscv --with-arch=rv32emc --with-abi=ilp32e
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sudo make # sudo needed if installing under default /opt/riscv location
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~~~~
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2. Compile custom binary to IHEX converter:
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2
ossc.qsf
2
ossc.qsf
@ -224,7 +224,7 @@ set_global_assignment -name ENABLE_SIGNALTAP OFF
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set_global_assignment -name USE_SIGNALTAP_FILE output_files/ossc_la.stp
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set_global_assignment -name FITTER_EFFORT "AUTO FIT"
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set_global_assignment -name SEED 15
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set_global_assignment -name SEED 16
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@ -136,7 +136,7 @@
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<CustomBuild Enabled="yes">
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<Target Name="compile_image_debug">make APP_CFLAGS_DEBUG_LEVEL="-DDEBUG" generate_hex</Target>
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<Target Name="compile_image_aud-debug">make ENABLE_AUDIO=y APP_CFLAGS_DEBUG_LEVEL="-DDEBUG" generate_hex</Target>
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<Target Name="Ack BSP update">cd ../sys_controller_bsp && touch public.mk Makefile</Target>
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<Target Name="Ack BSP update">cd ../sys_controller_bsp && touch bsp_timestamp</Target>
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<RebuildCommand/>
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<CleanCommand>make clean</CleanCommand>
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<BuildCommand>make APP_CFLAGS_DEBUG_LEVEL="-DDEBUG"</BuildCommand>
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@ -182,7 +182,7 @@
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<Target Name="compile_image">make generate_hex</Target>
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<Target Name="Build_jp">make OSDLANG=JP</Target>
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<Target Name="Build_audio">make ENABLE_AUDIO=y</Target>
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<Target Name="Ack BSP update">cd ../sys_controller_bsp && touch public.mk Makefile</Target>
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<Target Name="Ack BSP update">cd ../sys_controller_bsp && touch bsp_timestamp</Target>
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<RebuildCommand/>
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<CleanCommand>make clean</CleanCommand>
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<BuildCommand>make</BuildCommand>
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@ -169,7 +169,7 @@ C_SRCS += ossc/utils.c
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C_SRCS += ulibSD/sd_io.c
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C_SRCS += ulibSD/spi_io.c
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CXX_SRCS :=
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ASM_SRCS := crt0.boot.S
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ASM_SRCS := crt0.boot_E.S
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# Path to root of object file tree.
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@ -652,11 +652,11 @@ build_post_process :
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# included makefile fragment.
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#
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ifeq ($(DEFAULT_CROSS_COMPILE),)
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DEFAULT_CROSS_COMPILE := riscv64-unknown-elf-
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DEFAULT_CROSS_COMPILE := riscv32-unknown-elf-
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endif
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ifeq ($(DEFAULT_STACKREPORT),)
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DEFAULT_STACKREPORT := riscv64-unknown-elf-size
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DEFAULT_STACKREPORT := riscv32-unknown-elf-size
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endif
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ifeq ($(DEFAULT_DOWNLOAD),)
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@ -755,7 +755,7 @@ ifeq ($(MKDIR),)
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MKDIR := $(DEFAULT_MKDIR)
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endif
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RV_OBJCOPY = riscv64-unknown-elf-objcopy
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RV_OBJCOPY = riscv32-unknown-elf-objcopy
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#------------------------------------------------------------------------------
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# PATTERN RULES TO BUILD OBJECTS
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87
software/sys_controller/crt0.boot_E.S
Normal file
87
software/sys_controller/crt0.boot_E.S
Normal file
@ -0,0 +1,87 @@
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// Copyright 2017 ETH Zurich and University of Bologna.
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// Copyright and related rights are licensed under the Solderpad Hardware
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// License, Version 0.51 (the “License”); you may not use this file except in
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// compliance with the License. You may obtain a copy of the License at
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// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law
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// or agreed to in writing, software, hardware and materials distributed under
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// this License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR
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// CONDITIONS OF ANY KIND, either express or implied. See the License for the
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// specific language governing permissions and limitations under the License.
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#include "pulpino.h"
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#define EXCEPTION_STACK_SIZE 72
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/* ========================================================= [ entry ] === */
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.section .text
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default_exc_handler:
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jal x0, default_exc_handler
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reset_handler:
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/* set all registers to zero */
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mv x1, x0
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mv x2, x1
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mv x3, x1
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mv x4, x1
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mv x5, x1
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mv x6, x1
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mv x7, x1
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mv x8, x1
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mv x9, x1
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mv x10, x1
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mv x11, x1
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mv x12, x1
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mv x13, x1
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mv x14, x1
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mv x15, x1
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/* stack initilization */
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la x2, _stack_start
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_start:
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.global _start
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/* clear BSS */
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la x14, _bss_start
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la x15, _bss_end
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bge x14, x15, zero_loop_end
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zero_loop:
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sw x0, 0(x14)
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addi x14, x14, 4
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ble x14, x15, zero_loop
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zero_loop_end:
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main_entry:
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/* jump to alt_main program entry point */
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jal alt_main
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/* =================================================== [ exceptions ] === */
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/* This section has to be down here, since we have to disable rvc for it */
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.section .vectors, "ax"
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.option norvc;
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// external interrupts are handled by the same callback
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// until compiler supports IRQ routines
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.org 0x00
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.rept 31
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nop
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.endr
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jal x0, default_exc_handler
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// reset vector
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.org 0x80
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jal x0, reset_handler
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// illegal instruction exception
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.org 0x84
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jal x0, default_exc_handler
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// ecall handler
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.org 0x88
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jal x0, default_exc_handler
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File diff suppressed because it is too large
Load Diff
@ -112,10 +112,10 @@ SOPC_FILE := ../../sys.sopcinfo
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#-------------------------------------------------------------------------------
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# Archiver command. Creates library files.
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AR = riscv64-unknown-elf-ar
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AR = riscv32-unknown-elf-ar
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# Assembler command. Note that CC is used for .S files.
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AS = riscv64-unknown-elf-gcc
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AS = riscv32-unknown-elf-gcc
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# Custom flags only passed to the archiver. This content of this variable is
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# directly passed to the archiver rather than the more standard "ARFLAGS". The
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@ -139,10 +139,10 @@ BSP_CFLAGS_OPTIMIZATION = -Os
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BSP_CFLAGS_WARNINGS = -Wall
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# C compiler command.
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CC = riscv64-unknown-elf-gcc -xc
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CC = riscv32-unknown-elf-gcc -xc
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# C++ compiler command.
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CXX = riscv64-unknown-elf-gcc -xc++
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CXX = riscv32-unknown-elf-gcc -xc++
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# Command used to remove files during 'clean' target.
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RM = rm -f
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Binary file not shown.
@ -259,7 +259,7 @@ ALT_CPPFLAGS += -DSMALL_C_LIB
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# or common. none
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# setting hal.make.cflags_mgpopt is -mgpopt=global
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#ALT_CFLAGS += -mgpopt=global
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ALT_CFLAGS += -march=rv32imc -mabi=ilp32
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ALT_CFLAGS += -march=rv32emc -mabi=ilp32e
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# Enable BSP generation to query if SOPC system is big endian. If true ignores
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# export of 'ALT_CFLAGS += -meb' to public.mk if big endian system. none
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2
sys.qsys
2
sys.qsys
@ -725,7 +725,7 @@
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<parameter name="AXI_USER_WIDTH" value="0" />
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<parameter name="RISCY_RV32F" value="false" />
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<parameter name="USE_ZERO_RISCY" value="true" />
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<parameter name="ZERO_RV32E" value="false" />
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<parameter name="ZERO_RV32E" value="true" />
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<parameter name="ZERO_RV32M" value="true" />
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</module>
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<module name="timer_0" kind="altera_avalon_timer" version="17.1" enabled="1">
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@ -1,11 +1,11 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<EnsembleReport name="sys" kind="sys" version="1.0" fabric="QSYS">
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<!-- Format version 17.1 590 (Future versions may contain additional information.) -->
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<!-- 2018.10.10.22:28:26 -->
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<!-- 2018.10.29.20:53:41 -->
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<!-- A collection of modules and connections -->
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<parameter name="AUTO_GENERATION_ID">
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<type>java.lang.Integer</type>
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<value>1539199706</value>
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<value>1540839221</value>
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<derived>false</derived>
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<enabled>true</enabled>
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<visible>false</visible>
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@ -12922,7 +12922,7 @@ the requested settings for a module instance. -->
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</parameter>
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<parameter name="ZERO_RV32E">
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<type>boolean</type>
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<value>false</value>
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<value>true</value>
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<derived>false</derived>
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<enabled>true</enabled>
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<visible>true</visible>
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