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fix locking issue with fractional sample rates

This commit is contained in:
marqs 2023-10-19 18:51:32 +03:00
parent edb300e03a
commit 8b35ba3339
2 changed files with 3886 additions and 3884 deletions
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7766
software/sys_controller/mem_init/sys_onchip_memory2_0.hex
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4
software/sys_controller/ossc/av_controller.c
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@ -570,12 +570,14 @@ void program_mode()
cm.id = retval;
vm_sel = cm.id;
pll_h_total = (vm_conf.h_skip+1) * vmode_in.timings.h_total + (((vm_conf.h_skip+1) * vmode_in.timings.h_total_adj * 5 + 50) / 100);
// Double TVP7002 PLL sampling rate when possible to minimize jitter
while (1) {
pll_h_total = (vm_conf.h_skip+1) * vmode_in.timings.h_total + (((vm_conf.h_skip+1) * vmode_in.timings.h_total_adj * 5 + 50) / 100);
pclk_i_hz = h_hz * pll_h_total;
if ((pclk_i_hz < 25000000UL) && ((vm_conf.si_pclk_mult % 2) == 0)) {
pll_h_total *= 2;
vm_conf.h_skip = 2*(vm_conf.h_skip+1)-1;
vm_conf.si_pclk_mult /= 2;
} else {