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https://github.com/marqs85/ossc.git
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Release 0.73
* Fixed adv. timing tweaker using previous values when updating parameters * Added "Hsync tolerance" option to fix detection of certain Neo-Geo models
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@ -62,6 +62,7 @@ extern alt_u8 video_mode_cnt;
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alt_u8 target_typemask;
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alt_u8 target_type;
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alt_u8 stable_frames;
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alt_u8 update_cur_vm;
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alt_u8 vm_sel, vm_edit;
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alt_u16 tc_h_samplerate, tc_h_synclen, tc_h_active, tc_v_active, tc_h_bporch, tc_v_bporch;
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@ -148,6 +149,7 @@ status_t get_status(tvp_input_t input, video_format format)
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alt_u8 sync_active;
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alt_u8 vsyncmode;
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alt_u16 fpga_totlines;
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alt_u16 h_samplerate;
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status_t status;
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static alt_8 act_ctr;
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alt_u32 ctr;
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@ -230,6 +232,19 @@ status_t get_status(tvp_input_t input, video_format format)
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if ((tc.s480p_mode != cm.cc.s480p_mode) && (video_modes[cm.id].flags & (MODE_DTV480P|MODE_VGA480P)))
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status = (status < MODE_CHANGE) ? MODE_CHANGE : status;
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if (update_cur_vm) {
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if (video_modes[cm.id].flags & MODE_PLLDIVBY2)
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h_samplerate = 2*video_modes[cm.id].h_total;
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else
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h_samplerate = video_modes[cm.id].h_total;
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tvp_writereg(TVP_HPLLDIV_LSB, ((h_samplerate & 0xf) << 4));
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tvp_writereg(TVP_HPLLDIV_MSB, (h_samplerate >> 4));
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tvp_writereg(TVP_HSOUTWIDTH, video_modes[cm.id].h_synclen);
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status = (status < INFO_CHANGE) ? INFO_CHANGE : status;
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}
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cm.totlines = totlines;
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cm.clkcnt = clkcnt;
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cm.progressive = progressive;
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@ -251,6 +266,9 @@ status_t get_status(tvp_input_t input, video_format format)
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if (tc.sync_vth != cm.cc.sync_vth)
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tvp_set_sog_thold(tc.sync_vth);
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if (tc.linelen_tol != cm.cc.linelen_tol)
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tvp_set_linelen_tol(tc.linelen_tol);
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if (tc.vsync_thold != cm.cc.vsync_thold)
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tvp_set_ssthold(tc.vsync_thold);
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@ -270,6 +288,7 @@ status_t get_status(tvp_input_t input, video_format format)
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tvp_set_fine_gain_offset(&cm.cc.col);
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cm.cc = tc;
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update_cur_vm = 0;
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return status;
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}
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@ -397,25 +416,14 @@ void vm_display(alt_u8 code) {
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}
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void vm_tweak(alt_u16 v) {
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alt_u16 h_samplerate;
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if (cm.id == vm_edit) {
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if (video_modes[cm.id].h_total != tc_h_samplerate) {
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if (video_modes[cm.id].flags & MODE_PLLDIVBY2)
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h_samplerate = 2*video_modes[cm.id].h_total;
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else
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h_samplerate = video_modes[cm.id].h_total;
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tvp_writereg(TVP_HPLLDIV_LSB, ((h_samplerate & 0xf) << 4));
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tvp_writereg(TVP_HPLLDIV_MSB, (h_samplerate >> 4));
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}
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if (video_modes[cm.id].h_synclen != tc_h_synclen)
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tvp_writereg(TVP_HSOUTWIDTH, video_modes[cm.id].h_synclen);
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if ((video_modes[cm.id].h_active != tc_h_active) ||
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if (cm.sync_active && (cm.id == vm_edit)) {
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if ((video_modes[cm.id].h_total != tc_h_samplerate) ||
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(video_modes[cm.id].h_synclen != tc_h_synclen) ||
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(video_modes[cm.id].h_active != tc_h_active) ||
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(video_modes[cm.id].v_active != tc_v_active) ||
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(video_modes[cm.id].h_backporch != (alt_u8)tc_h_bporch) ||
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(video_modes[cm.id].v_backporch != (alt_u8)tc_v_bporch))
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set_videoinfo();
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update_cur_vm = 1;
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}
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video_modes[vm_edit].h_total = tc_h_samplerate;
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video_modes[vm_edit].h_synclen = (alt_u8)tc_h_synclen;
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@ -33,6 +33,7 @@
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extern mode_data_t video_modes[], video_modes_def[];
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extern alt_u8 video_mode_cnt;
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extern alt_u8 update_cur_vm;
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// Target configuration
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avconfig_t tc;
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@ -41,6 +42,7 @@ avconfig_t tc;
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const avconfig_t tc_default = {
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.sampler_phase = DEFAULT_SAMPLER_PHASE,
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.sync_vth = DEFAULT_SYNC_VTH,
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.linelen_tol = DEFAULT_LINELEN_TOL,
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.vsync_thold = DEFAULT_VSYNC_THOLD,
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.pre_coast = DEFAULT_PRE_COAST,
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.post_coast = DEFAULT_POST_COAST,
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@ -60,6 +62,7 @@ int set_default_avconfig()
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tc.tx_mode = !!(IORD_ALTERA_AVALON_PIO_DATA(PIO_1_BASE) & HDMITX_MODE_MASK);
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memcpy(video_modes, video_modes_def, video_mode_cnt*sizeof(mode_data_t));
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update_cur_vm = 1;
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return 0;
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}
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@ -51,6 +51,7 @@ typedef struct {
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alt_u8 sampler_phase;
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alt_u8 ypbpr_cs;
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alt_u8 sync_vth;
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alt_u8 linelen_tol;
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alt_u8 vsync_thold;
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alt_u8 sync_lpf;
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alt_u8 video_lpf;
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@ -23,7 +23,7 @@
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#include "alt_types.h"
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#define FW_VER_MAJOR 0
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#define FW_VER_MINOR 72
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#define FW_VER_MINOR 73
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#define FW_UPDATE_RETRIES 3
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@ -87,6 +87,7 @@ MENU(menu_sampling, P99_PROTECT({ \
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MENU(menu_sync, P99_PROTECT({ \
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{ "Analog sync LPF", OPT_AVCONFIG_SELECTION, { .sel = { &tc.sync_lpf, OPT_WRAP, SETTING_ITEM(sync_lpf_desc) } } },
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{ "Analog sync Vth", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.sync_vth, OPT_NOWRAP, 0, SYNC_VTH_MAX, sync_vth_disp } } },
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{ "Hsync tolerance", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.linelen_tol, OPT_NOWRAP, 0, 0xFF, intclks_to_time_disp } } },
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{ "Vsync threshold", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.vsync_thold, OPT_NOWRAP, VSYNC_THOLD_MIN, VSYNC_THOLD_MAX, intclks_to_time_disp } } },
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{ "H-PLL Pre-Coast", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.pre_coast, OPT_NOWRAP, 0, PLL_COAST_MAX, lines_disp } } },
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{ "H-PLL Post-Coast", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.post_coast, OPT_NOWRAP, 0, PLL_COAST_MAX, lines_disp } } },
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@ -130,6 +130,10 @@ inline void tvp_set_hpllcoast(alt_u8 pre, alt_u8 post)
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tvp_writereg(TVP_HPLLPOSTCOAST, post);
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}
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inline void tvp_set_linelen_tol(alt_u8 val) {
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tvp_writereg(TVP_LINELENTOL, val);
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}
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inline void tvp_set_ssthold(alt_u8 vsdetect_thold)
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{
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tvp_writereg(TVP_SSTHOLD, vsdetect_thold);
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@ -163,7 +167,7 @@ void tvp_init()
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tvp_set_sync_lpf(0);
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// Increase line length tolerance
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tvp_writereg(TVP_LINELENTOL, 0x06);
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tvp_set_linelen_tol(DEFAULT_LINELEN_TOL);
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// Use HSYNC leading edge as fine clamp reference
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// Allows minimizing HSYNC window
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@ -338,8 +342,8 @@ void tvp_source_setup(alt_8 modeid, video_type type, alt_u32 vlines, alt_u8 hz,
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tvp_set_ssthold(vsync_thold);
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// Setup Macrovision stripper and H-PLL coast.
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// Coast needs to be enabled when HSYNC is missing during VSYNC. Disabled only for RGBHV.
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// Setup Macrovision stripper and H-PLL coast signal.
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// Coast needs to be enabled when HSYNC is missing during VSYNC. RGBHV mode cannot use it, so turn off the internal signal for this mode.
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// Macrovision stripper filters out glitches and serration pulses that may occur outside of sync window (HSYNC_lead +- TVP_MVSWIDTH*37ns). Enabled for all inputs.
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switch (type) {
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case VIDEO_PC:
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@ -28,6 +28,7 @@
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#define I2CA_BASE I2C_OPENCORES_0_BASE
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#define DEFAULT_VSYNC_THOLD 0x44
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#define DEFAULT_LINELEN_TOL 0x06
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typedef enum {
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TVP_INPUT1 = 0,
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@ -80,6 +81,8 @@ inline void tvp_enable_output();
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inline void tvp_set_hpllcoast(alt_u8 pre, alt_u8 post);
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inline void tvp_set_linelen_tol(alt_u8 val);
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inline void tvp_set_ssthold(alt_u8 vsdetect_thold);
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void tvp_init();
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@ -2,8 +2,8 @@
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<sch:Settings xmlns:sch="http://www.altera.com/embeddedsw/bsp/schema">
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<BspType>hal</BspType>
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<BspVersion>default</BspVersion>
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<BspGeneratedTimeStamp>Aug 23, 2016 7:19:50 PM</BspGeneratedTimeStamp>
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<BspGeneratedUnixTimeStamp>1471969190153</BspGeneratedUnixTimeStamp>
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<BspGeneratedTimeStamp>Sep 4, 2016 3:02:52 AM</BspGeneratedTimeStamp>
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<BspGeneratedUnixTimeStamp>1472947372974</BspGeneratedUnixTimeStamp>
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<BspGeneratedLocation>./</BspGeneratedLocation>
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<BspSettingsFile>settings.bsp</BspSettingsFile>
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<SopcDesignFile>../../sys.sopcinfo</SopcDesignFile>
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4
sys.qsys
4
sys.qsys
@ -349,8 +349,8 @@
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<parameter name="readIRQThreshold" value="8" />
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<parameter name="simInputCharacterStream" value="" />
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<parameter name="simInteractiveOptions">NO_INTERACTIVE_WINDOWS</parameter>
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<parameter name="useRegistersForReadBuffer" value="false" />
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<parameter name="useRegistersForWriteBuffer" value="false" />
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<parameter name="useRegistersForReadBuffer" value="true" />
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<parameter name="useRegistersForWriteBuffer" value="true" />
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<parameter name="useRelativePathForSimFile" value="false" />
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<parameter name="writeBufferDepth" value="64" />
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<parameter name="writeIRQThreshold" value="8" />
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@ -1,11 +1,11 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<EnsembleReport name="sys" kind="sys" version="1.0" fabric="QSYS">
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<!-- Format version 15.1 185 (Future versions may contain additional information.) -->
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<!-- 2016.08.20.01:49:03 -->
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<!-- 2016.09.04.02:58:13 -->
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<!-- A collection of modules and connections -->
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<parameter name="AUTO_GENERATION_ID">
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<type>java.lang.Integer</type>
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<value>1471646943</value>
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<value>1472947093</value>
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<derived>false</derived>
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<enabled>true</enabled>
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<visible>false</visible>
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@ -2904,7 +2904,7 @@ the requested settings for a module instance. -->
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</parameter>
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<parameter name="useRegistersForReadBuffer">
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<type>boolean</type>
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<value>false</value>
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<value>true</value>
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<derived>false</derived>
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<enabled>true</enabled>
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<visible>true</visible>
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@ -2912,7 +2912,7 @@ the requested settings for a module instance. -->
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</parameter>
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<parameter name="useRegistersForWriteBuffer">
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<type>boolean</type>
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<value>false</value>
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<value>true</value>
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<derived>false</derived>
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<enabled>true</enabled>
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<visible>true</visible>
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