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Set fast output on HDMI_TX pins.
Also adjust timing constraits to reflect working state with line3x at 162 MHz.
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parent
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14
ossc.qsf
14
ossc.qsf
@ -240,4 +240,18 @@ set_global_assignment -name SDC_FILE ossc.sdc
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set_global_assignment -name CDF_FILE output_files/Chain1.cdf
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set_global_assignment -name SIGNALTAP_FILE output_files/ossc_la.stp
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set_global_assignment -name QIP_FILE rtl/char_array.qip
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set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_DE
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set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_HS
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set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_PCLK
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set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_VS
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set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_BD
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set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_GD
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set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_RD
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_DE
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_HS
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_PCLK
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_VS
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_BD
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_GD
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_RD
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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8
ossc.sdc
8
ossc.sdc
@ -10,8 +10,8 @@ set_false_path -to {sys:sys_inst|sys_pio_1:pio_1|readdata*}
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### Scanconverter clock constraints ###
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create_clock -period 108MHz -name pclk_1x [get_ports PCLK_in]
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create_clock -period 33MHz -name pclk_2x_source [get_ports PCLK_in] -add
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create_clock -period 33MHz -name pclk_3x_source [get_ports PCLK_in] -add
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create_clock -period 54MHz -name pclk_2x_source [get_ports PCLK_in] -add
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create_clock -period 54MHz -name pclk_3x_source [get_ports PCLK_in] -add
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create_clock -period 33MHz -name pclk_4x_source [get_ports PCLK_in] -add
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create_clock -period 33MHz -name pclk_5x_source [get_ports PCLK_in] -add
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@ -54,8 +54,8 @@ foreach_in_collection c [get_clocks "pclk_1x pclk_*_source"] {
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}
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# output delay constraints
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set IT_Tsu 1.0
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set IT_Th -0.5
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set IT_Tsu 1.5
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set IT_Th -0.3
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set critoutputs_hdmi [get_ports {HDMI_TX_RD* HDMI_TX_GD* HDMI_TX_BD* HDMI_TX_DE HDMI_TX_HS HDMI_TX_VS}]
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foreach_in_collection c [get_clocks pclk_*_out] {
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set_output_delay -clock $c -min $IT_Th $critoutputs_hdmi -add
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23
tools/Makefile
Normal file
23
tools/Makefile
Normal file
@ -0,0 +1,23 @@
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.PHONY: generate_hex update_mif generate_firmware assemble_ossc
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all: generate_firmware
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generate_hex: bin2hex
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$(MAKE) -C ../software/sys_controller generate_hex
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update_mif: generate_hex
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cd .. && quartus_cdb ossc --update_mif
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assemble_ossc: update_mif
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cd .. && quartus_asm ossc
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generate_firmware: assemble_ossc create_fw_img
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./create_fw_img ../output_files/ossc.rbf 0.86 aud-psp
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bin2hex: bin2hex.c
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$(CC) bin2hex.c -o bin2hex
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create_fw_img: create_fw_img.c
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gcc create_fw_img.c -o create_fw_img
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# vim: set noet ts=2 sw=2 sts=2
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