6502/ossc
1
0
Fork 0
mirror of https://github.com/marqs85/ossc.git synced 2025-02-07 11:30:35 +00:00
Code Issues Projects Releases Wiki Activity

* 480p/576p line2x

Browse Source 
* 480i/576i passthrough
* alternating scanlines for interlaced material
This commit is contained in:
marqs 2016-07-09 23:12:35 +03:00
parent a2e10637bd
commit c8b542b917
13 changed files with 910 additions and 872 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
rtl/ossc.v
View File

@ -87,7 +87,7 @@ reg reset_n_reg = 1'b1;
assign LED_R = HSYNC_in;
assign LED_G = VSYNC_in;
`else
assign LED_R = (pll_lock_lost != 3'b000)|h_unstable;
assign LED_R = videogen_sel ? 1'b0 : ((pll_lock_lost != 3'b000)|h_unstable);
assign LED_G = (ir_code == 0);
`endif

36
rtl/scanconverter.v
View File

@ -31,6 +31,11 @@
`define LINETRIPLE_M2 2'h2
`define LINETRIPLE_M3 2'h3
`define SCANLINES_OFF 2'h0
`define SCANLINES_H 2'h1
`define SCANLINES_V 2'h2
`define SCANLINES_ALT 2'h3
`define VSYNCGEN_LEN 6
`define VSYNCGEN_GENMID_BIT 0
`define VSYNCGEN_CHOPMID_BIT 1
@ -122,9 +127,8 @@ reg [10:0] H_ACTIVE; //max. 2047
reg [7:0] H_BACKPORCH; //max. 255
reg [10:0] V_ACTIVE; //max. 2047
reg [5:0] V_BACKPORCH; //max. 63
reg V_SCANLINES;
reg V_SCANLINEDIR;
reg V_SCANLINEID;
reg [1:0] V_SCANLINES;
reg [1:0] V_SCANLINEID;
reg [7:0] V_SCANLINESTR;
reg [5:0] V_MASK;
reg [1:0] H_LINEMULT;
@ -150,17 +154,19 @@ assign pclk_out_3x_h5x = pclk_3x_h5x;
//Scanline generation
function [8:0] apply_scanlines;
input enable;
input dir;
input [1:0] mode;
input [8:0] data;
input [8:0] str;
input [1:0] actid;
input [1:0] lineid;
input pixid;
input fid;
begin
if (enable & (dir == 1'b0) & (actid == lineid))
if ((mode == `SCANLINES_H) & (actid == lineid))
apply_scanlines = (data > str) ? (data-str) : 8'h00;
else if (enable & (dir == 1'b1) & (actid == pixid))
else if ((mode == `SCANLINES_V) & (actid == pixid))
apply_scanlines = (data > str) ? (data-str) : 8'h00;
else if ((mode == `SCANLINES_ALT) & ((actid[0]^fid) == lineid[0]))
apply_scanlines = (data > str) ? (data-str) : 8'h00;
else
apply_scanlines = data;
@ -371,9 +377,9 @@ begin
VSYNC_pp1 <= VSYNC_act;
DATA_enable_pp1 <= DATA_enable_act;
R_out <= apply_scanlines(V_SCANLINES, V_SCANLINEDIR, R_pp1, V_SCANLINESTR, {1'b0, V_SCANLINEID}, slid_act, hcnt_act[0]);
G_out <= apply_scanlines(V_SCANLINES, V_SCANLINEDIR, G_pp1, V_SCANLINESTR, {1'b0, V_SCANLINEID}, slid_act, hcnt_act[0]);
B_out <= apply_scanlines(V_SCANLINES, V_SCANLINEDIR, B_pp1, V_SCANLINESTR, {1'b0, V_SCANLINEID}, slid_act, hcnt_act[0]);
R_out <= apply_scanlines(V_SCANLINES, R_pp1, V_SCANLINESTR, V_SCANLINEID, slid_act, hcnt_act[0], FID_prev);
G_out <= apply_scanlines(V_SCANLINES, G_pp1, V_SCANLINESTR, V_SCANLINEID, slid_act, hcnt_act[0], FID_prev);
B_out <= apply_scanlines(V_SCANLINES, B_pp1, V_SCANLINESTR, V_SCANLINEID, slid_act, hcnt_act[0], FID_prev);
HSYNC_out <= HSYNC_pp1;
VSYNC_out <= VSYNC_pp1;
DATA_enable <= DATA_enable_pp1;
@ -439,7 +445,6 @@ begin
V_ACTIVE <= 0;
V_BACKPORCH <= 0;
V_SCANLINES <= 0;
V_SCANLINEDIR <= 0;
V_SCANLINEID <= 0;
V_SCANLINESTR <= 0;
V_MASK <= 0;
@ -495,11 +500,10 @@ begin
H_MASK <= h_info[27:22];
V_ACTIVE <= v_info[17:7]; // Vertical active length from by the CPU, 11bits (0...2047)
V_BACKPORCH <= v_info[5:0]; // Vertical backporch length from by the CPU, 6bits (0...64)
V_SCANLINES <= v_info[31];
V_SCANLINEDIR <= v_info[30];
V_SCANLINEID <= v_info[29];
V_SCANLINESTR <= ((v_info[28:25]+8'h01)<<4)-1'b1;
V_MASK <= v_info[24:19];
V_SCANLINES <= v_info[31:30];
V_SCANLINEID <= v_info[29:28];
V_SCANLINESTR <= ((v_info[27:24]+8'h01)<<4)-1'b1;
V_MASK <= v_info[23:18];
end
prev_hs <= HSYNC_in;

19
software/sys_controller/it6613/it6613_drv.c
View File

@ -3207,7 +3207,26 @@ DISABLE_MPG_INFOFRM_PKT()
HDMITX_WriteI2C_Byte(REG_TX_MPG_INFOFRM_CTRL,0);
}
void HDMITX_SetPixelRepetition(int pixelrep, int set_infoframe) {
BYTE pllpr;
//Switch_HDMITX_Bank(0);
pllpr = HDMITX_ReadI2C_Byte(REG_TX_CLK_CTRL1) & 0x2F;
pixelrep &= 0x3;
if (set_infoframe) {
HDMITX_WriteI2C_Byte(REG_TX_CLK_CTRL1, pllpr);
Switch_HDMITX_Bank(1);
HDMITX_WriteI2C_Byte(REG_TX_AVIINFO_DB5, pixelrep);
} else {
pllpr |= (1<<4)|(pixelrep<<6);
HDMITX_WriteI2C_Byte(REG_TX_CLK_CTRL1, pllpr);
Switch_HDMITX_Bank(1);
HDMITX_WriteI2C_Byte(REG_TX_AVIINFO_DB5, 0);
}
Switch_HDMITX_Bank(0);
}
//////////////////////////////////////////////////////////////////////
// Function: SetAVIInfoFrame()

1
software/sys_controller/it6613/it6613_drv.h
View File

@ -827,6 +827,7 @@ BOOL EnableAudioInfoFrame(BYTE bEnable,BYTE *pAudioInfoFrame);
void SetAVMute(BYTE bEnable) ;
void SetOutputColorDepthPhase(BYTE ColorDepth,BYTE bPhase) ;
void Get6613Reg(BYTE *pReg) ;
void HDMITX_SetPixelRepetition(int pixelrep, int set_infoframe);
////////////////////////////////////////////////////////////////////
// Required Interfance

1636
software/sys_controller/mem_init/sys_onchip_memory2_0.hex
View File

File diff suppressed because it is too large Load Diff

63
software/sys_controller/ossc/av_controller.c
View File

@ -47,8 +47,6 @@
#define SYNC_LOSS_THOLD 5
#define STATUS_TIMEOUT 10000
#define HDMITX_MODE_MASK 0x00040000
// Current mode
avmode_t cm;
@ -232,7 +230,9 @@ status_t get_status(tvp_input_t input, video_format format)
(tc.sl_str != cm.cc.sl_str) ||
(tc.sl_id != cm.cc.sl_id) ||
(tc.h_mask != cm.cc.h_mask) ||
(tc.v_mask != cm.cc.v_mask))
(tc.v_mask != cm.cc.v_mask) ||
(tc.edtv_l2x != cm.cc.edtv_l2x) ||
(tc.interlace_pt != cm.cc.interlace_pt))
status = (status < INFO_CHANGE) ? INFO_CHANGE : status;
if (tc.sampler_phase != cm.cc.sampler_phase)
@ -264,21 +264,20 @@ status_t get_status(tvp_input_t input, video_format format)
return status;
}
// h_info: [31:30] [29:28] [27:22] [21] [20:10] [7:0]
// | H_LINEMULT[1:0] | H_L3MODE[1:0] | H_MASK[5:0] | | H_ACTIVE[10:0] | H_BACKPORCH[7:0] |
// h_info: [31:30] [29:28] [27:22] [21] [20:10] [9:8] [7:0]
// | H_LINEMULT[1:0] | H_L3MODE[1:0] | H_MASK[5:0] | | H_ACTIVE[10:0] | | H_BACKPORCH[7:0] |
//
// v_info: [31] [30] [29] [28:25] [24:19] [18] [17:7] [6] [5:0]
// | V_SCANLINES | V_SCANLINEDIR | V_SCANLINEID | V_SCANLINESTR[3:0] | V_MASK[5:0] | | V_ACTIVE[10:0] | | V_BACKPORCH[5:0] |
// v_info: [31] [30] [29:28] [27:24] [23:18] [17:7] [6] [5:0]
// | V_SCANLINES | V_SCANLINEDIR | V_SCANLINEID | V_SCANLINESTR[3:0] | V_MASK[5:0] | V_ACTIVE[10:0] | | V_BACKPORCH[5:0] |
void set_videoinfo()
{
alt_u8 slid_target;
alt_u8 sl_en_fpga;
alt_u8 sl_mode_fpga = 0;
alt_u8 sl_mode_fpga;
if (video_modes[cm.id].flags & MODE_L3ENABLE_MASK) {
cm.linemult = 2;
slid_target = cm.cc.sl_id ? 2 : 0;
} else if (video_modes[cm.id].flags & MODE_L2ENABLE) {
slid_target = cm.cc.sl_id ? (cm.cc.sl_type == 1 ? 1 : 2) : 0;
} else if ((video_modes[cm.id].flags & MODE_L2ENABLE) || (cm.cc.edtv_l2x && (video_modes[cm.id].type & VIDEO_EDTV))) {
cm.linemult = 1;
slid_target = cm.cc.sl_id;
} else {
@ -286,20 +285,33 @@ void set_videoinfo()
slid_target = cm.cc.sl_id;
}
if (cm.cc.sl_mode == 0) {
sl_en_fpga = 0;
} else if (cm.cc.sl_mode == 2) { //manual
sl_en_fpga = 1;
sl_mode_fpga = cm.cc.sl_type;
} else if ((video_modes[cm.id].flags & (MODE_L2ENABLE|MODE_L3ENABLE_MASK)) && !(video_modes[cm.id].flags & MODE_INTERLACED)) {
sl_en_fpga = 1;
sl_mode_fpga = 0;
if (cm.cc.sl_mode == 2) { //manual
sl_mode_fpga = 1+cm.cc.sl_type;
} else if (cm.cc.sl_mode == 1) { //auto
if (video_modes[cm.id].flags & MODE_INTERLACED)
sl_mode_fpga = 3;
else if (video_modes[cm.id].flags & (MODE_L2ENABLE|MODE_L3ENABLE_MASK))
sl_mode_fpga = 1;
else
sl_mode_fpga = 0;
} else {
sl_en_fpga = 0;
sl_mode_fpga = 0;
}
if ((cm.cc.interlace_pt) && (video_modes[cm.id].flags & MODE_INTERLACED)) {
cm.linemult = 0;
sl_mode_fpga = 0;
}
IOWR_ALTERA_AVALON_PIO_DATA(PIO_2_BASE, (cm.linemult<<30) | (cm.cc.l3_mode<<28) | (cm.cc.h_mask)<<22 | (video_modes[cm.id].h_active<<10) | video_modes[cm.id].h_backporch);
IOWR_ALTERA_AVALON_PIO_DATA(PIO_3_BASE, (sl_en_fpga<<31) | (sl_mode_fpga<<30) | (slid_target<<29) | (cm.cc.sl_str<<25) | (cm.cc.v_mask<<19) | (video_modes[cm.id].v_active<<7) | video_modes[cm.id].v_backporch);
IOWR_ALTERA_AVALON_PIO_DATA(PIO_3_BASE, (sl_mode_fpga<<30) | (slid_target<<28) | (cm.cc.sl_str<<24) | (cm.cc.v_mask<<18) | (video_modes[cm.id].v_active<<7) | video_modes[cm.id].v_backporch);
if (video_modes[cm.id].type & VIDEO_EDTV)
HDMITX_SetPixelRepetition(cm.cc.edtv_l2x, 0);
else if (video_modes[cm.id].flags & MODE_INTERLACED)
HDMITX_SetPixelRepetition(cm.cc.interlace_pt, (cm.cc.tx_mode==TX_HDMI));
else
HDMITX_SetPixelRepetition(0, 0);
}
// Configure TVP7002 and scan converter logic based on the video mode
@ -410,19 +422,11 @@ int init_hw()
// safe?
read_userdata();
// enforce DVI mode on non-DIY boards
if ((IORD_ALTERA_AVALON_PIO_DATA(PIO_1_BASE) & HDMITX_MODE_MASK)) {
cm.cc.tx_mode = TX_DVI;
tc.tx_mode = TX_DVI;
}
if (!(IORD_ALTERA_AVALON_PIO_DATA(PIO_1_BASE) & PB1_BIT))
setup_rc();
// init always in HDMI mode (fixes yellow screen bug)
TX_enable(TX_HDMI);
if (tc.tx_mode == TX_DVI)
TX_enable(tc.tx_mode);
return 0;
}
@ -569,6 +573,7 @@ int main()
if (tc.tx_mode != cm.cc.tx_mode) {
TX_enable(tc.tx_mode);
cm.cc.tx_mode = tc.tx_mode;
cm.clkcnt = 0; //TODO: proper invalidate
}
if (av_init) {

2
software/sys_controller/ossc/av_controller.h
View File

@ -22,6 +22,8 @@
#include "avconfig.h"
#define HDMITX_MODE_MASK 0x00040000
static const char *avinput_str[] = { "-", "AV1: RGBS", "AV1: RGsB", "AV1: YPbPr", "AV2: YPbPr", "AV2: RGsB", "AV3: RGBHV", "AV3: RGBS", "AV3: RGsB", "AV3: YPbPr" };
typedef enum {

4
software/sys_controller/ossc/avconfig.c
View File

@ -18,7 +18,10 @@
//
#include <string.h>
#include "system.h"
#include "avconfig.h"
#include "av_controller.h"
#include "altera_avalon_pio_regs.h"
#include "tvp7002.h"
#define DEFAULT_PRE_COAST 1
@ -42,6 +45,7 @@ const avconfig_t tc_default = {
int set_default_avconfig()
{
memcpy(&tc, &tc_default, sizeof(avconfig_t));
tc.tx_mode = !!(IORD_ALTERA_AVALON_PIO_DATA(PIO_1_BASE) & HDMITX_MODE_MASK);
return 0;
}

4
software/sys_controller/ossc/avconfig.h
View File

@ -32,7 +32,7 @@
#define PLL_COAST_MAX 5
#define SL_MODE_MAX 2
#define SL_TYPE_MAX 1
#define SL_TYPE_MAX 2
#define LM_MODE_MAX 1
typedef struct {
@ -55,6 +55,8 @@ typedef struct {
alt_u8 en_alc;
alt_u8 pre_coast;
alt_u8 post_coast;
alt_u8 edtv_l2x;
alt_u8 interlace_pt;
} __attribute__((packed)) avconfig_t;
int set_default_avconfig();

2
software/sys_controller/ossc/firmware.h
View File

@ -23,7 +23,7 @@
#include "alt_types.h"
#define FW_VER_MAJOR 0
#define FW_VER_MINOR 70
#define FW_VER_MINOR 71
#define FW_UPDATE_RETRIES 3

5
software/sys_controller/ossc/menu.c
View File

@ -44,7 +44,7 @@ static const char *sync_lpf_desc[] = { "Off", "33MHz (min)", "10MHz (med)", "2.5
static const char *l3_mode_desc[] = { "Generic 16:9", "Generic 4:3", "320x240 optim.", "256x240 optim." };
static const char *tx_mode_desc[] = { "HDMI", "DVI" };
static const char *sl_mode_desc[] = { "Off", "Auto", "Manual" };
static const char *sl_type_desc[] = { "Horizontal", "Vertical" };
static const char *sl_type_desc[] = { "Horizontal", "Vertical", "Alternating" };
static const char *sl_id_desc[] = { "Even", "Odd" };
static void sampler_phase_disp(alt_u8 v) { sniprintf(menu_row2, LCD_ROW_LEN+1, "%d deg", (v*1125)/100); }
@ -77,7 +77,8 @@ MENU(menu_sync, P99_PROTECT({ \
MENU(menu_output, P99_PROTECT({ \
{ "240p/288p lineX3", OPT_AVCONFIG_SELECTION, { .sel = { &tc.linemult_target, OPT_WRAP, SETTING_ITEM(off_on_desc) } } },
{ "Linetriple mode", OPT_AVCONFIG_SELECTION, { .sel = { &tc.l3_mode, OPT_WRAP, SETTING_ITEM(l3_mode_desc) } } },
//{ "Interlace passt.", OPT_AVCONFIG_SELECTION, { .sel = { &tc.s480p_mode, SETTING_ITEM(s480p_desc) } } },
{ "480p/576p lineX2", OPT_AVCONFIG_SELECTION, { .sel = { &tc.edtv_l2x, OPT_WRAP, SETTING_ITEM(off_on_desc) } } },
{ "480i/576i passtr", OPT_AVCONFIG_SELECTION, { .sel = { &tc.interlace_pt, OPT_WRAP, SETTING_ITEM(off_on_desc) } } },
{ "TX mode", OPT_AVCONFIG_SELECTION, { .sel = { &tc.tx_mode, OPT_WRAP, SETTING_ITEM(tx_mode_desc) } } },
}))

4
software/sys_controller_bsp/settings.bsp
View File

@ -2,8 +2,8 @@
<sch:Settings xmlns:sch="http://www.altera.com/embeddedsw/bsp/schema">
<BspType>hal</BspType>
<BspVersion>default</BspVersion>
<BspGeneratedTimeStamp>May 24, 2016 11:37:31 PM</BspGeneratedTimeStamp>
<BspGeneratedUnixTimeStamp>1464122251538</BspGeneratedUnixTimeStamp>
<BspGeneratedTimeStamp>Jul 5, 2016 9:45:39 PM</BspGeneratedTimeStamp>
<BspGeneratedUnixTimeStamp>1467744339754</BspGeneratedUnixTimeStamp>
<BspGeneratedLocation>./</BspGeneratedLocation>
<BspSettingsFile>settings.bsp</BspSettingsFile>
<SopcDesignFile>../../sys.sopcinfo</SopcDesignFile>

4
sys.sopcinfo
View File

@ -1,11 +1,11 @@
<?xml version="1.0" encoding="UTF-8"?>
<EnsembleReport name="sys" kind="sys" version="1.0" fabric="QSYS">
<!-- Format version 15.1 185 (Future versions may contain additional information.) -->
<!-- 2016.04.15.19:15:35 -->
<!-- 2016.07.05.21:14:28 -->
<!-- A collection of modules and connections -->
<parameter name="AUTO_GENERATION_ID">
<type>java.lang.Integer</type>
<value>1460736934</value>
<value>1467742468</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>