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Release 0.67. 

- Code cleanup
- Some project files added
- PAL linetriple added
- FPGA PLL parameters optimized
- Reduced jitter on low video clock sources
This commit is contained in:
marqs 2016-03-27 22:40:44 +03:00
parent 388c464f63
commit f502b2e46c
30 changed files with 3680 additions and 2691 deletions
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32
ossc.cof Normal file
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<?xml version="1.0" encoding="US-ASCII" standalone="yes"?>
<cof>
<eprom_name>EPCS16</eprom_name>
<flash_loader_device>EP4CE15</flash_loader_device>
<output_filename>output_files/ossc.jic</output_filename>
<n_pages>1</n_pages>
<width>1</width>
<mode>7</mode>
<sof_data>
<user_name>Page_0</user_name>
<page_flags>1</page_flags>
<bit0>
<sof_filename>output_files/ossc.sof</sof_filename>
</bit0>
</sof_data>
<version>9</version>
<create_cvp_file>0</create_cvp_file>
<create_hps_iocsr>0</create_hps_iocsr>
<auto_create_rpd>0</auto_create_rpd>
<create_fif_file>0</create_fif_file>
<options>
<map_file>1</map_file>
</options>
<advanced_options>
<ignore_epcs_id_check>0</ignore_epcs_id_check>
<ignore_condone_check>2</ignore_condone_check>
<plc_adjustment>0</plc_adjustment>
<post_chain_bitstream_pad_bytes>-1</post_chain_bitstream_pad_bytes>
<post_device_bitstream_pad_bytes>-1</post_device_bitstream_pad_bytes>
<bitslice_pre_padding>1</bitslice_pre_padding>
</advanced_options>
</cof>

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ossc.workspace Normal file
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<?xml version="1.0" encoding="UTF-8"?>
<CodeLite_Workspace Name="ossc" Database="">
<Project Name="ossc_rtl" Path="ossc_rtl.project" Active="No"/>
<Project Name="ossc_sw_bsp" Path="ossc_sw_bsp.project" Active="No"/>
<Project Name="ossc_sw" Path="software/ossc_sw.project" Active="Yes"/>
<Project Name="tools" Path="tools.project" Active="No"/>
<BuildMatrix>
<WorkspaceConfiguration Name="Debug" Selected="yes">
<Environment/>
<Project Name="ossc_rtl" ConfigName="Debug"/>
<Project Name="ossc_sw_bsp" ConfigName="Debug"/>
<Project Name="ossc_sw" ConfigName="Debug"/>
<Project Name="tools" ConfigName="Debug"/>
</WorkspaceConfiguration>
<WorkspaceConfiguration Name="Release" Selected="no">
<Environment/>
<Project Name="ossc_rtl" ConfigName="Release"/>
<Project Name="ossc_sw_bsp" ConfigName="Release"/>
<Project Name="ossc_sw" ConfigName="Release"/>
<Project Name="tools" ConfigName="Release"/>
</WorkspaceConfiguration>
</BuildMatrix>
</CodeLite_Workspace>

135
ossc_rtl.project Normal file
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<?xml version="1.0" encoding="UTF-8"?>
<CodeLite_Project Name="ossc_rtl" InternalType="">
<VirtualDirectory Name="ip">
<VirtualDirectory Name="nios2_hw_crc">
<VirtualDirectory Name="hdl">
<File Name="ip/nios2_hw_crc/hdl/CRC_Component.v"/>
<File Name="ip/nios2_hw_crc/hdl/CRC_Custom_Instruction.v"/>
</VirtualDirectory>
</VirtualDirectory>
<VirtualDirectory Name="altera_epcq_controller_mod">
<File Name="ip/altera_epcq_controller_mod/altera_epcq_controller_fifo.v"/>
</VirtualDirectory>
<VirtualDirectory Name="altera_nios_custom_instr_endianconverter_qsys">
<File Name="ip/altera_nios_custom_instr_endianconverter_qsys/endianconverter_qsys.v"/>
</VirtualDirectory>
<VirtualDirectory Name="i2c_opencores">
<File Name="ip/i2c_opencores/i2c_master_defines.v"/>
<File Name="ip/i2c_opencores/i2c_master_bit_ctrl.v"/>
<File Name="ip/i2c_opencores/i2c_master_top.v"/>
<File Name="ip/i2c_opencores/i2c_master_byte_ctrl.v"/>
<File Name="ip/i2c_opencores/timescale.v"/>
<File Name="ip/i2c_opencores/i2c_opencores.v"/>
</VirtualDirectory>
</VirtualDirectory>
<Description/>
<Dependencies/>
<Settings Type="Dynamic Library">
<GlobalSettings>
<Compiler Options="" C_Options="" Assembler="">
<IncludePath Value="."/>
</Compiler>
<Linker Options="">
<LibraryPath Value="."/>
</Linker>
<ResourceCompiler Options=""/>
</GlobalSettings>
<Configuration Name="Debug" CompilerType="GCC" DebuggerType="GNU gdb debugger" Type="Dynamic Library" BuildCmpWithGlobalSettings="append" BuildLnkWithGlobalSettings="append" BuildResWithGlobalSettings="append">
<Compiler Options="-g" C_Options="-g" Assembler="" Required="yes" PreCompiledHeader="" PCHInCommandLine="no" PCHFlags="" PCHFlagsPolicy="0">
<IncludePath Value="."/>
</Compiler>
<Linker Options="" Required="yes"/>
<ResourceCompiler Options="" Required="no"/>
<General OutputFile="" IntermediateDirectory="./Debug" Command="" CommandArguments="" UseSeparateDebugArgs="no" DebugArguments="" WorkingDirectory="$(IntermediateDirectory)" PauseExecWhenProcTerminates="yes" IsGUIProgram="no" IsEnabled="yes"/>
<Environment EnvVarSetName="&lt;Use Defaults&gt;" DbgSetName="&lt;Use Defaults&gt;">
<![CDATA[]]>
</Environment>
<Debugger IsRemote="no" RemoteHostName="" RemoteHostPort="" DebuggerPath="" IsExtended="no">
<DebuggerSearchPaths/>
<PostConnectCommands/>
<StartupCommands/>
</Debugger>
<PreBuild/>
<PostBuild/>
<CustomBuild Enabled="yes">
<RebuildCommand/>
<CleanCommand>make clean</CleanCommand>
<BuildCommand>make</BuildCommand>
<PreprocessFileCommand/>
<SingleFileCommand/>
<MakefileGenerationCommand/>
<ThirdPartyToolName>None</ThirdPartyToolName>
<WorkingDirectory>$(WorkspacePath)</WorkingDirectory>
</CustomBuild>
<AdditionalRules>
<CustomPostBuild/>
<CustomPreBuild/>
</AdditionalRules>
<Completion EnableCpp11="no" EnableCpp14="no">
<ClangCmpFlagsC/>
<ClangCmpFlags/>
<ClangPP/>
<SearchPaths/>
</Completion>
</Configuration>
<Configuration Name="Release" CompilerType="GCC" DebuggerType="GNU gdb debugger" Type="Dynamic Library" BuildCmpWithGlobalSettings="append" BuildLnkWithGlobalSettings="append" BuildResWithGlobalSettings="append">
<Compiler Options="" C_Options="" Assembler="" Required="yes" PreCompiledHeader="" PCHInCommandLine="no" PCHFlags="" PCHFlagsPolicy="0">
<IncludePath Value="."/>
</Compiler>
<Linker Options="-O2" Required="yes"/>
<ResourceCompiler Options="" Required="no"/>
<General OutputFile="" IntermediateDirectory="./Release" Command="" CommandArguments="" UseSeparateDebugArgs="no" DebugArguments="" WorkingDirectory="$(IntermediateDirectory)" PauseExecWhenProcTerminates="yes" IsGUIProgram="no" IsEnabled="yes"/>
<Environment EnvVarSetName="&lt;Use Defaults&gt;" DbgSetName="&lt;Use Defaults&gt;">
<![CDATA[]]>
</Environment>
<Debugger IsRemote="no" RemoteHostName="" RemoteHostPort="" DebuggerPath="" IsExtended="no">
<DebuggerSearchPaths/>
<PostConnectCommands/>
<StartupCommands/>
</Debugger>
<PreBuild/>
<PostBuild/>
<CustomBuild Enabled="yes">
<RebuildCommand/>
<CleanCommand>make clean</CleanCommand>
<BuildCommand>make</BuildCommand>
<PreprocessFileCommand/>
<SingleFileCommand/>
<MakefileGenerationCommand/>
<ThirdPartyToolName>None</ThirdPartyToolName>
<WorkingDirectory>$(WorkspacePath)</WorkingDirectory>
</CustomBuild>
<AdditionalRules>
<CustomPostBuild/>
<CustomPreBuild/>
</AdditionalRules>
<Completion EnableCpp11="no" EnableCpp14="no">
<ClangCmpFlagsC/>
<ClangCmpFlags/>
<ClangPP/>
<SearchPaths/>
</Completion>
</Configuration>
</Settings>
<VirtualDirectory Name="rtl">
<File Name="rtl/ir_rcv.v"/>
<File Name="rtl/pll_3x_lowfreq_BAK.v"/>
<File Name="rtl/ossc.v"/>
<File Name="rtl/pll_2x.v"/>
<File Name="rtl/ir_rcv_option2.v"/>
<File Name="rtl/pll_3x_lowfreq.v"/>
<File Name="rtl/pll_3x_lowfreq_bb.v"/>
<File Name="rtl/linebuf_inst.v"/>
<File Name="rtl/videogen.v"/>
<File Name="rtl/pll_3x_BAK.v"/>
<File Name="rtl/timescale.v"/>
<File Name="rtl/pll_2x_bb.v"/>
<File Name="rtl/linebuf.v"/>
<File Name="rtl/pll_2x_BAK.v"/>
<File Name="rtl/pll_3x.v"/>
<File Name="rtl/scanconverter.v"/>
<File Name="rtl/linebuf_bb.v"/>
</VirtualDirectory>
<Dependencies Name="Debug"/>
<Dependencies Name="Release"/>
</CodeLite_Project>

341
ossc_sw_bsp.project Normal file
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<?xml version="1.0" encoding="UTF-8"?>
<CodeLite_Project Name="ossc_sw_bsp" InternalType="">
<Plugins>
<Plugin Name="qmake">
<![CDATA[00020001N0005Debug0000000000000001N0007Release000000000000]]>
</Plugin>
<Plugin Name="CMakePlugin">
<![CDATA[[{
"name": "Debug",
"enabled": false,
"buildDirectory": "build",
"sourceDirectory": "$(ProjectPath)",
"generator": "",
"buildType": "",
"arguments": [],
"parentProject": ""
}, {
"name": "Release",
"enabled": false,
"buildDirectory": "build",
"sourceDirectory": "$(ProjectPath)",
"generator": "",
"buildType": "",
"arguments": [],
"parentProject": ""
}]]]>
</Plugin>
</Plugins>
<VirtualDirectory Name="software">
<VirtualDirectory Name="sys_controller_bsp">
<VirtualDirectory Name="drivers">
<VirtualDirectory Name="inc">
<File Name="software/sys_controller_bsp/drivers/inc/altera_avalon_jtag_uart.h"/>
<File Name="software/sys_controller_bsp/drivers/inc/altera_avalon_jtag_uart_regs.h"/>
<File Name="software/sys_controller_bsp/drivers/inc/ci_crc.h"/>
<File Name="software/sys_controller_bsp/drivers/inc/crc.h"/>
<File Name="software/sys_controller_bsp/drivers/inc/altera_epcq_controller_mod_regs.h"/>
<File Name="software/sys_controller_bsp/drivers/inc/altera_avalon_jtag_uart_fd.h"/>
<File Name="software/sys_controller_bsp/drivers/inc/altera_epcq_controller_mod.h"/>
<File Name="software/sys_controller_bsp/drivers/inc/i2c_opencores_regs.h"/>
<File Name="software/sys_controller_bsp/drivers/inc/i2c_opencores.h"/>
<File Name="software/sys_controller_bsp/drivers/inc/Altera_UP_SD_Card_Avalon_Interface_mod.h"/>
<File Name="software/sys_controller_bsp/drivers/inc/altera_avalon_pio_regs.h"/>
</VirtualDirectory>
<VirtualDirectory Name="src">
<File Name="software/sys_controller_bsp/drivers/src/altera_epcq_controller_mod.c"/>
<File Name="software/sys_controller_bsp/drivers/src/altera_avalon_jtag_uart_read.c"/>
<File Name="software/sys_controller_bsp/drivers/src/altera_avalon_jtag_uart_ioctl.c"/>
<File Name="software/sys_controller_bsp/drivers/src/ci_crc.c"/>
<File Name="software/sys_controller_bsp/drivers/src/Altera_UP_SD_Card_Avalon_Interface_mod.c"/>
<File Name="software/sys_controller_bsp/drivers/src/i2c_opencores.c"/>
<File Name="software/sys_controller_bsp/drivers/src/altera_avalon_jtag_uart_init.c"/>
<File Name="software/sys_controller_bsp/drivers/src/crc.c"/>
<File Name="software/sys_controller_bsp/drivers/src/altera_avalon_jtag_uart_write.c"/>
<File Name="software/sys_controller_bsp/drivers/src/altera_avalon_jtag_uart_fd.c"/>
</VirtualDirectory>
</VirtualDirectory>
<VirtualDirectory Name="HAL">
<VirtualDirectory Name="inc">
<VirtualDirectory Name="sys">
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_license_reminder_ucosii.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_flash_dev.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_sys_init.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_driver.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_irq_entry.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_sim.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/termios.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_flash_types.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_llist.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_warning.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_stdio.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_dma_dev.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_alarm.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_log_printf.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_flash.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_load.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_cache.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_dev.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_debug.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_irq.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_set_args.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_dma.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_sys_wrappers.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_exceptions.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/ioctl.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_errno.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_timestamp.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/sys/alt_stack.h"/>
</VirtualDirectory>
<VirtualDirectory Name="priv">
<File Name="software/sys_controller_bsp/HAL/inc/priv/alt_dev_llist.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/priv/alt_iic_isr_register.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/priv/nios2_gmon_data.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/priv/alt_file.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/priv/alt_alarm.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/priv/alt_exception_handler_registry.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/priv/alt_legacy_irq.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/priv/alt_busy_sleep.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/priv/alt_no_error.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/priv/alt_irq_table.h"/>
</VirtualDirectory>
<VirtualDirectory Name="os">
<File Name="software/sys_controller_bsp/HAL/inc/os/alt_hooks.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/os/alt_sem.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/os/alt_syscall.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/os/alt_flag.h"/>
</VirtualDirectory>
<File Name="software/sys_controller_bsp/HAL/inc/alt_types.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/io.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/nios2.h"/>
<File Name="software/sys_controller_bsp/HAL/inc/altera_nios2_gen2_irq.h"/>
</VirtualDirectory>
<VirtualDirectory Name="src">
<File Name="software/sys_controller_bsp/HAL/src/alt_instruction_exception_register.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_environ.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_unlink.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_dev.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_io_redirect.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_kill.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_close.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_env_lock.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_irq_vars.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_log_printf.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_stat.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_usleep.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_iic.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_gettod.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_ioctl.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_printf.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_dma_rxchan_open.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_isatty.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_getpid.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_gmon.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_iic_isr_register.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_malloc_lock.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_busy_sleep.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_fd_lock.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_ecc_fatal_exception.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_putcharbuf.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_putchar.c"/>
<File Name="software/sys_controller_bsp/HAL/src/altera_nios2_gen2_irq.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_fd_unlock.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_alarm_start.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_dcache_flush.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_main.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_dev_llist_insert.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_fcntl.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_lseek.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_find_file.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_uncached_free.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_fork.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_wait.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_do_ctors.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_exit.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_read.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_load.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_remap_uncached.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_flash_dev.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_irq_handler.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_tick.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_settod.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_dcache_flush_no_writeback.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_do_dtors.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_rename.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_getchar.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_open.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_instruction_exception_entry.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_remap_cached.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_get_fd.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_irq_register.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_dcache_flush_all.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_fs_reg.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_icache_flush_all.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_icache_flush.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_find_dev.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_link.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_sbrk.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_errno.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_release_fd.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_times.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_fstat.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_write.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_execve.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_uncached_malloc.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_dma_txchan_open.c"/>
<File Name="software/sys_controller_bsp/HAL/src/alt_putstr.c"/>
</VirtualDirectory>
</VirtualDirectory>
<File Name="software/sys_controller_bsp/linker.h"/>
<File Name="software/sys_controller_bsp/alt_sys_init.c"/>
<File Name="software/sys_controller_bsp/system.h"/>
</VirtualDirectory>
</VirtualDirectory>
<VirtualDirectory Name="ip">
<VirtualDirectory Name="i2c_opencores">
<VirtualDirectory Name="HAL">
<VirtualDirectory Name="inc">
<File Name="ip/i2c_opencores/HAL/inc/i2c_opencores.h"/>
</VirtualDirectory>
<VirtualDirectory Name="src">
<File Name="ip/i2c_opencores/HAL/src/i2c_opencores.c"/>
</VirtualDirectory>
</VirtualDirectory>
<VirtualDirectory Name="Docs">
<File Name="ip/i2c_opencores/Docs/I2C_tests.c"/>
</VirtualDirectory>
<VirtualDirectory Name="inc">
<File Name="ip/i2c_opencores/inc/i2c_opencores_regs.h"/>
</VirtualDirectory>
</VirtualDirectory>
<VirtualDirectory Name="nios2_hw_crc">
<VirtualDirectory Name="HAL">
<VirtualDirectory Name="doc">
<File Name="ip/nios2_hw_crc/HAL/doc/crc_main.c"/>
</VirtualDirectory>
<VirtualDirectory Name="inc">
<File Name="ip/nios2_hw_crc/HAL/inc/ci_crc.h"/>
<File Name="ip/nios2_hw_crc/HAL/inc/crc.h"/>
</VirtualDirectory>
<VirtualDirectory Name="src">
<File Name="ip/nios2_hw_crc/HAL/src/ci_crc.c"/>
<File Name="ip/nios2_hw_crc/HAL/src/crc.c"/>
</VirtualDirectory>
</VirtualDirectory>
</VirtualDirectory>
<VirtualDirectory Name="altera_up_sd_card_avalon_interface_mod">
<VirtualDirectory Name="HAL">
<VirtualDirectory Name="inc">
<File Name="ip/altera_up_sd_card_avalon_interface_mod/HAL/inc/Altera_UP_SD_Card_Avalon_Interface_mod.h"/>
</VirtualDirectory>
<VirtualDirectory Name="src">
<File Name="ip/altera_up_sd_card_avalon_interface_mod/HAL/src/Altera_UP_SD_Card_Avalon_Interface_mod.c"/>
</VirtualDirectory>
</VirtualDirectory>
</VirtualDirectory>
<VirtualDirectory Name="altera_epcq_controller_mod">
<VirtualDirectory Name="HAL">
<VirtualDirectory Name="inc">
<File Name="ip/altera_epcq_controller_mod/HAL/inc/altera_epcq_controller_mod.h"/>
</VirtualDirectory>
<VirtualDirectory Name="src">
<File Name="ip/altera_epcq_controller_mod/HAL/src/altera_epcq_controller_mod.c"/>
</VirtualDirectory>
</VirtualDirectory>
<VirtualDirectory Name="inc">
<File Name="ip/altera_epcq_controller_mod/inc/altera_epcq_controller_mod_regs.h"/>
</VirtualDirectory>
</VirtualDirectory>
</VirtualDirectory>
<Description/>
<Dependencies/>
<Dependencies Name="Debug"/>
<Dependencies Name="Release"/>
<Settings Type="Dynamic Library">
<GlobalSettings>
<Compiler Options="" C_Options="" Assembler="">
<IncludePath Value="."/>
</Compiler>
<Linker Options="">
<LibraryPath Value="."/>
</Linker>
<ResourceCompiler Options=""/>
</GlobalSettings>
<Configuration Name="Debug" CompilerType="GCC" DebuggerType="GNU gdb debugger" Type="Dynamic Library" BuildCmpWithGlobalSettings="append" BuildLnkWithGlobalSettings="append" BuildResWithGlobalSettings="append">
<Compiler Options="-g" C_Options="-g" Assembler="" Required="yes" PreCompiledHeader="" PCHInCommandLine="no" PCHFlags="" PCHFlagsPolicy="0">
<IncludePath Value="."/>
</Compiler>
<Linker Options="" Required="yes"/>
<ResourceCompiler Options="" Required="no"/>
<General OutputFile="" IntermediateDirectory="./Debug" Command="" CommandArguments="" UseSeparateDebugArgs="no" DebugArguments="" WorkingDirectory="$(IntermediateDirectory)" PauseExecWhenProcTerminates="yes" IsGUIProgram="no" IsEnabled="yes"/>
<Environment EnvVarSetName="&lt;Use Defaults&gt;" DbgSetName="&lt;Use Defaults&gt;">
<![CDATA[]]>
</Environment>
<Debugger IsRemote="no" RemoteHostName="" RemoteHostPort="" DebuggerPath="" IsExtended="no">
<DebuggerSearchPaths/>
<PostConnectCommands/>
<StartupCommands/>
</Debugger>
<PreBuild/>
<PostBuild/>
<CustomBuild Enabled="yes">
<RebuildCommand/>
<CleanCommand>make clean</CleanCommand>
<BuildCommand>nios2-bsp-generate-files --bsp-dir . --settings settings.bsp</BuildCommand>
<PreprocessFileCommand/>
<SingleFileCommand/>
<MakefileGenerationCommand/>
<ThirdPartyToolName>None</ThirdPartyToolName>
<WorkingDirectory>$(ProjectPath)/software/sys_controller_bsp</WorkingDirectory>
</CustomBuild>
<AdditionalRules>
<CustomPostBuild/>
<CustomPreBuild/>
</AdditionalRules>
<Completion EnableCpp11="no" EnableCpp14="no">
<ClangCmpFlagsC/>
<ClangCmpFlags/>
<ClangPP/>
<SearchPaths/>
</Completion>
</Configuration>
<Configuration Name="Release" CompilerType="GCC" DebuggerType="GNU gdb debugger" Type="Dynamic Library" BuildCmpWithGlobalSettings="append" BuildLnkWithGlobalSettings="append" BuildResWithGlobalSettings="append">
<Compiler Options="" C_Options="" Assembler="" Required="yes" PreCompiledHeader="" PCHInCommandLine="no" PCHFlags="" PCHFlagsPolicy="0">
<IncludePath Value="."/>
</Compiler>
<Linker Options="-O2" Required="yes"/>
<ResourceCompiler Options="" Required="no"/>
<General OutputFile="" IntermediateDirectory="./Release" Command="" CommandArguments="" UseSeparateDebugArgs="no" DebugArguments="" WorkingDirectory="$(IntermediateDirectory)" PauseExecWhenProcTerminates="yes" IsGUIProgram="no" IsEnabled="yes"/>
<Environment EnvVarSetName="&lt;Use Defaults&gt;" DbgSetName="&lt;Use Defaults&gt;">
<![CDATA[]]>
</Environment>
<Debugger IsRemote="no" RemoteHostName="" RemoteHostPort="" DebuggerPath="" IsExtended="no">
<DebuggerSearchPaths/>
<PostConnectCommands/>
<StartupCommands/>
</Debugger>
<PreBuild/>
<PostBuild/>
<CustomBuild Enabled="yes">
<RebuildCommand/>
<CleanCommand>make clean</CleanCommand>
<BuildCommand>nios2-bsp-generate-files --bsp-dir . --settings settings.bsp</BuildCommand>
<PreprocessFileCommand/>
<SingleFileCommand/>
<MakefileGenerationCommand/>
<ThirdPartyToolName>None</ThirdPartyToolName>
<WorkingDirectory>$(ProjectPath)/software/sys_controller_bsp</WorkingDirectory>
</CustomBuild>
<AdditionalRules>
<CustomPostBuild/>
<CustomPreBuild/>
</AdditionalRules>
<Completion EnableCpp11="no" EnableCpp14="no">
<ClangCmpFlagsC/>
<ClangCmpFlags/>
<ClangPP/>
<SearchPaths/>
</Completion>
</Configuration>
</Settings>
</CodeLite_Project>

14
rtl/ir_rcv.v
View File

@ -1,5 +1,5 @@
//
// Copyright (C) 2015 Markus Hiienkari <mhiienka@niksula.hut.fi>
// Copyright (C) 2015-2016 Markus Hiienkari <mhiienka@niksula.hut.fi>
//
// This file is part of Open Source Scan Converter project.
//
@ -29,15 +29,15 @@ module ir_rcv (
output reg ir_code_ack
);
// 20ns clock period
// ~37ns clock period
parameter LEADCODE_LO_THOLD = 124200; //4.60ms
parameter LEADCODE_HI_THOLD = 113400; //4.20ms
parameter LEADCODE_HI_RPT_THOLD = 56700; //2.1ms
parameter LEADCODE_LO_THOLD = 226800; //8.4ms
parameter LEADCODE_HI_THOLD = 118800; //4.4ms
parameter LEADCODE_HI_RPT_THOLD = 54000; //2.0ms
parameter RPT_RELEASE_THOLD = 3240000; //120ms
parameter BIT_ONE_THOLD = 22410; //0.83ms
parameter BIT_ONE_THOLD = 27000; //1.0ms
parameter BIT_DETECT_THOLD = 10800; //0.4ms
parameter IDLE_THOLD = 141557; //5.24ms
parameter IDLE_THOLD = 141480; //5.24ms
reg [1:0] state; // 3 states
reg [31:0] databuf; // temp. buffer

5
rtl/ossc.v
View File

@ -1,5 +1,5 @@
//
// Copyright (C) 2015 Markus Hiienkari <mhiienka@niksula.hut.fi>
// Copyright (C) 2015-2016 Markus Hiienkari <mhiienka@niksula.hut.fi>
//
// This file is part of Open Source Scan Converter project.
//
@ -137,7 +137,7 @@ sys sys_inst(
`ifdef DEBUG
.pio_4_linecount_in_export ({8'h00, R_in, G_in, B_in}),
`else
.pio_4_linecount_in_export ({14'h0000, fpga_vsyncgen, 5'h00, lines_out}),
.pio_4_linecount_in_export ({VSYNC_out, 13'h0000, fpga_vsyncgen, 5'h00, lines_out}),
`endif
.pio_5_lcd_ctrl_out_export (lcd_ctrl),
.i2c_opencores_0_export_scl_pad_io (scl),
@ -149,6 +149,7 @@ sys sys_inst(
);
scanconverter scanconverter_inst (
.reset_n (reset_n_reg),
.HSYNC_in (HSYNC_in),
.VSYNC_in (VSYNC_in),
.PCLK_in (PCLK_in),

9
rtl/pll_2x.v
View File

@ -9,7 +9,7 @@
// altpll
//
// Simulation Library Files(s):
//
// altera_mf
// ============================================================
// ************************************************************
// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
@ -103,7 +103,7 @@ module pll_2x (
.vcooverrange (),
.vcounderrange ());
defparam
altpll_component.bandwidth_type = "LOW",
altpll_component.bandwidth_type = "HIGH",
altpll_component.clk0_divide_by = 1,
altpll_component.clk0_duty_cycle = 50,
altpll_component.clk0_multiply_by = 2,
@ -169,7 +169,7 @@ endmodule
// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1"
// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "High"
// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "0"
// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "1"
// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
@ -246,7 +246,7 @@ endmodule
// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "LOW"
// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "HIGH"
// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1"
// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "2"
@ -317,4 +317,5 @@ endmodule
// Retrieval info: GEN_FILE: TYPE_NORMAL pll_2x.bsf FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL pll_2x_inst.v FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL pll_2x_bb.v TRUE
// Retrieval info: LIB_FILE: altera_mf
// Retrieval info: CBX_MODULE_PREFIX: ON

9
rtl/pll_3x.v
View File

@ -9,7 +9,7 @@
// altpll
//
// Simulation Library Files(s):
//
// altera_mf
// ============================================================
// ************************************************************
// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
@ -107,7 +107,7 @@ module pll_3x (
.vcooverrange (),
.vcounderrange ());
defparam
altpll_component.bandwidth_type = "LOW",
altpll_component.bandwidth_type = "HIGH",
altpll_component.clk0_divide_by = 1,
altpll_component.clk0_duty_cycle = 50,
altpll_component.clk0_multiply_by = 3,
@ -177,7 +177,7 @@ endmodule
// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1"
// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "High"
// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "0"
// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "1"
// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
@ -268,7 +268,7 @@ endmodule
// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "LOW"
// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "HIGH"
// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1"
// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "3"
@ -345,4 +345,5 @@ endmodule
// Retrieval info: GEN_FILE: TYPE_NORMAL pll_3x.bsf FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL pll_3x_inst.v FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL pll_3x_bb.v FALSE
// Retrieval info: LIB_FILE: altera_mf
// Retrieval info: CBX_MODULE_PREFIX: ON

9
rtl/pll_3x_lowfreq.v
View File

@ -9,7 +9,7 @@
// altpll
//
// Simulation Library Files(s):
//
// altera_mf
// ============================================================
// ************************************************************
// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
@ -111,7 +111,7 @@ module pll_3x_lowfreq (
.vcooverrange (),
.vcounderrange ());
defparam
altpll_component.bandwidth_type = "LOW",
altpll_component.bandwidth_type = "HIGH",
altpll_component.clk0_divide_by = 1,
altpll_component.clk0_duty_cycle = 50,
altpll_component.clk0_multiply_by = 3,
@ -185,7 +185,7 @@ endmodule
// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1"
// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "High"
// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "0"
// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "1"
// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
@ -290,7 +290,7 @@ endmodule
// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "LOW"
// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "HIGH"
// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1"
// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "3"
@ -373,4 +373,5 @@ endmodule
// Retrieval info: GEN_FILE: TYPE_NORMAL pll_3x_lowfreq.bsf FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL pll_3x_lowfreq_inst.v FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL pll_3x_lowfreq_bb.v TRUE
// Retrieval info: LIB_FILE: altera_mf
// Retrieval info: CBX_MODULE_PREFIX: ON

137
rtl/scanconverter.v
View File

@ -1,5 +1,5 @@
//
// Copyright (C) 2015 Markus Hiienkari <mhiienka@niksula.hut.fi>
// Copyright (C) 2015-2016 Markus Hiienkari <mhiienka@niksula.hut.fi>
//
// This file is part of Open Source Scan Converter project.
//
@ -48,6 +48,7 @@
`define HSYNC_TRAILING_EDGE ((prev_hs == `LO) & (HSYNC_in == `HI))
module scanconverter (
input reset_n,
input [7:0] R_in,
input [7:0] G_in,
input [7:0] B_in,
@ -103,9 +104,8 @@ reg h_enable_3x_prev4x, h_enable_3x_prev3x_h4x, h_enable_3x_prev3x_h5x;
reg [1:0] hcnt_3x_h4x_ctr;
reg [1:0] hcnt_3x_h5x_ctr;
reg pclk_1x_prev3x, pclk_1x_prev3x_h1x, pclk_1x_prev3x_h4x;
reg pclk_1x_prev3x, pclk_1x_prev3x_h1x;
reg [1:0] pclk_3x_cnt, pclk_3x_h1x_cnt;
reg [3:0] pclk_3x_h4x_cnt;
// Data enable
reg h_enable_1x, v_enable_1x;
@ -345,12 +345,24 @@ linebuf linebuf_rgb (
);
//Postprocess pipeline
always @(posedge pclk_act /*or negedge reset_n*/)
always @(posedge pclk_act or negedge reset_n)
begin
/*if (!reset_n)
if (!reset_n)
begin
R_pp1 <= 8'h00;
G_pp1 <= 8'h00;
G_pp1 <= 8'h00;
HSYNC_pp1 <= 1'b0;
VSYNC_pp1 <= 1'b0;
DATA_enable_pp1 <= 1'b0;
R_out <= 8'h00;
G_out <= 8'h00;
G_out <= 8'h00;
HSYNC_out <= 1'b0;
VSYNC_out <= 1'b0;
DATA_enable <= 1'b0;
end
else*/
else
begin
R_pp1 <= apply_mask(1, R_act, hcnt_act, H_BACKPORCH+H_MASK, H_BACKPORCH+H_ACTIVE-H_MASK, vcnt_act, V_BACKPORCH+V_MASK, V_BACKPORCH+V_ACTIVE-V_MASK);
G_pp1 <= apply_mask(1, G_act, hcnt_act, H_BACKPORCH+H_MASK, H_BACKPORCH+H_ACTIVE-H_MASK, vcnt_act, V_BACKPORCH+V_MASK, V_BACKPORCH+V_ACTIVE-V_MASK);
@ -369,12 +381,16 @@ begin
end
//Generate a warning signal from horizontal instability or PLL sync loss
always @(posedge pclk_1x /*or negedge reset_n*/)
always @(posedge pclk_1x or negedge reset_n)
begin
/*if (!reset_n)
if (!reset_n)
begin
warn_h_unstable <= 1'b0;
warn_pll_lock_lost <= 1'b0;
warn_pll_lock_lost_3x <= 1'b0;
warn_pll_lock_lost_3x_lowfreq <= 1'b0;
end
else*/
else
begin
if (hmax[0] != hmax[1])
warn_h_unstable <= 1;
@ -402,12 +418,42 @@ assign h_unstable = (warn_h_unstable != 0);
assign pll_lock_lost = {(warn_pll_lock_lost != 0), (warn_pll_lock_lost_3x != 0), (warn_pll_lock_lost_3x_lowfreq != 0)};
//Buffer the inputs using input pixel clock and generate 1x signals
always @(posedge pclk_1x /*or negedge reset_n*/)
always @(posedge pclk_1x or negedge reset_n)
begin
/*if (!reset_n)
if (!reset_n)
begin
hcnt_1x <= 0;
hmax[line_idx] <= 0;
line_idx <= 0;
vcnt_1x <= 0;
vcnt_1x_tvp <= 0;
FID_prev <= 0;
fpga_vsyncgen <= 0;
lines_1x <= 0;
H_ACTIVE <= 0;
H_BACKPORCH <= 0;
H_LINEMULT <= 0;
H_L3MODE <= 0;
H_MASK <= 0;
V_ACTIVE <= 0;
V_BACKPORCH <= 0;
V_SCANLINES <= 0;
V_SCANLINEDIR <= 0;
V_SCANLINEID <= 0;
V_SCANLINESTR <= 0;
V_MASK <= 0;
prev_hs <= 0;
prev_vs <= 0;
HSYNC_start <= 0;
R_1x <= 8'h00;
G_1x <= 8'h00;
B_1x <= 8'h00;
HSYNC_1x <= 0;
VSYNC_1x <= 0;
h_enable_1x <= 0;
v_enable_1x <= 0;
end
else*/
else
begin
if (`HSYNC_TRAILING_EDGE)
begin
@ -483,12 +529,19 @@ begin
end
//Generate 2x signals for linedouble
always @(posedge pclk_2x /*or negedge reset_n*/)
always @(posedge pclk_2x or negedge reset_n)
begin
/*if (!reset_n)
if (!reset_n)
begin
hcnt_2x <= 0;
vcnt_2x <= 0;
lines_2x <= 0;
HSYNC_2x <= 0;
VSYNC_2x <= 0;
h_enable_2x <= 0;
v_enable_2x <= 0;
end
else*/
else
begin
if ((pclk_1x == 1'b0) & `HSYNC_TRAILING_EDGE) //sync with posedge of pclk_1x
hcnt_2x <= 0;
@ -532,12 +585,20 @@ begin
end
//Generate 3x signals for linetriple M0
always @(posedge pclk_3x /*or negedge reset_n*/)
always @(posedge pclk_3x or negedge reset_n)
begin
/*if (!reset_n)
if (!reset_n)
begin
hcnt_3x <= 0;
vcnt_3x <= 0;
lines_3x <= 0;
HSYNC_3x <= 0;
h_enable_3x <= 0;
v_enable_3x <= 0;
pclk_3x_cnt <= 0;
pclk_1x_prev3x <= 0;
end
else*/
else
begin
if ((pclk_3x_cnt == 0) & `HSYNC_TRAILING_EDGE) //sync with posedge of pclk_1x
hcnt_3x <= 0;
@ -571,12 +632,14 @@ begin
end
//Generate 4x signals for linetriple M1
always @(posedge pclk_4x /*or negedge reset_n*/)
always @(posedge pclk_4x or negedge reset_n)
begin
/*if (!reset_n)
if (!reset_n)
begin
hcnt_4x <= 0;
h_enable_3x_prev4x <= 0;
end
else*/
else
begin
// Can we sync reliably to h_enable_3x???
if ((h_enable_3x == 1) & (h_enable_3x_prev4x == 0))
@ -591,12 +654,20 @@ end
//Generate 3x_h1x signals for linetriple M2 and M3
always @(posedge pclk_3x_h1x /*or negedge reset_n*/)
always @(posedge pclk_3x_h1x or negedge reset_n)
begin
/*if (!reset_n)
if (!reset_n)
begin
hcnt_3x_h1x <= 0;
vcnt_3x_h1x <= 0;
lines_3x_h1x <= 0;
HSYNC_3x_h1x <= 0;
h_enable_3x_h1x <= 0;
v_enable_3x_h1x <= 0;
pclk_3x_h1x_cnt <= 0;
pclk_1x_prev3x_h1x <= 0;
end
else*/
else
begin
if ((pclk_3x_h1x_cnt == 0) & `HSYNC_TRAILING_EDGE) //sync with posedge of pclk_1x
hcnt_3x_h1x <= 0;
@ -632,12 +703,15 @@ end
//Generate 3x_h4x signals for for linetriple M2
always @(posedge pclk_3x_h4x /*or negedge reset_n*/)
always @(posedge pclk_3x_h4x or negedge reset_n)
begin
/*if (!reset_n)
if (!reset_n)
begin
hcnt_3x_h4x <= 0;
hcnt_3x_h4x_ctr <= 0;
h_enable_3x_prev3x_h4x <= 0;
end
else*/
else
begin
// Can we sync reliably to h_enable_3x???
if ((h_enable_3x_h1x == 1) & (h_enable_3x_prev3x_h4x == 0))
@ -657,12 +731,15 @@ begin
end
//Generate 3x_h5x signals for for linetriple M3
always @(posedge pclk_3x_h5x /*or negedge reset_n*/)
always @(posedge pclk_3x_h5x or negedge reset_n)
begin
/*if (!reset_n)
if (!reset_n)
begin
hcnt_3x_h5x <= 0;
hcnt_3x_h5x_ctr <= 0;
h_enable_3x_prev3x_h5x <= 0;
end
else*/
else
begin
// Can we sync reliably to h_enable_3x???
if ((h_enable_3x_h1x == 1) & (h_enable_3x_prev3x_h5x == 0))

4
rtl/videogen.v
View File

@ -1,5 +1,5 @@
//
// Copyright (C) 2015 Markus Hiienkari <mhiienka@niksula.hut.fi>
// Copyright (C) 2015-2016 Markus Hiienkari <mhiienka@niksula.hut.fi>
//
// This file is part of Open Source Scan Converter project.
//
@ -29,7 +29,7 @@ module videogen (
output reg ENABLE_out
);
//Parameters for 720x480@60Hz (858dots x 525lines), dotclk 27MHz -> 59.94Hz
//Parameters for 720x480@59.94Hz (858px x 525lines, pclk 27MHz -> 59.94Hz)
parameter H_SYNCLEN = 62;
parameter H_BACKPORCH = 60;
parameter H_ACTIVE = 720;

156
software/ossc_sw.project Normal file
View File

@ -0,0 +1,156 @@
<?xml version="1.0" encoding="UTF-8"?>
<CodeLite_Project Name="ossc_sw" InternalType="">
<Plugins>
<Plugin Name="qmake">
<![CDATA[00020001N0005Debug0000000000000001N0007Release000000000000]]>
</Plugin>
<Plugin Name="CMakePlugin">
<![CDATA[[{
"name": "Debug",
"enabled": false,
"buildDirectory": "build",
"sourceDirectory": "$(ProjectPath)",
"generator": "",
"buildType": "",
"arguments": [],
"parentProject": ""
}, {
"name": "Release",
"enabled": false,
"buildDirectory": "build",
"sourceDirectory": "$(ProjectPath)",
"generator": "",
"buildType": "",
"arguments": [],
"parentProject": ""
}]]]>
</Plugin>
</Plugins>
<VirtualDirectory Name="sys_controller">
<VirtualDirectory Name="ths7353">
<File Name="sys_controller/ths7353/ths7353.h"/>
<File Name="sys_controller/ths7353/ths7353.c"/>
</VirtualDirectory>
<VirtualDirectory Name="it6613">
<File Name="sys_controller/it6613/it6613_drv.c"/>
<File Name="sys_controller/it6613/HDMI_TX.c"/>
<File Name="sys_controller/it6613/HDMI_TX.h"/>
<File Name="sys_controller/it6613/it6613.c"/>
<File Name="sys_controller/it6613/it6613_drv.h"/>
<File Name="sys_controller/it6613/hdmitx_nios2.c"/>
<File Name="sys_controller/it6613/EDID.c"/>
<File Name="sys_controller/it6613/it6613_sys.h"/>
<File Name="sys_controller/it6613/HDMI_COMMON.h"/>
<File Name="sys_controller/it6613/hdmitx.h"/>
<File Name="sys_controller/it6613/it6613.h"/>
<File Name="sys_controller/it6613/it6613_sys.c"/>
<File Name="sys_controller/it6613/edid.h"/>
<File Name="sys_controller/it6613/typedef.h"/>
</VirtualDirectory>
<VirtualDirectory Name="spi_charlcd">
<File Name="sys_controller/spi_charlcd/lcd.c"/>
<File Name="sys_controller/spi_charlcd/lcd.h"/>
</VirtualDirectory>
<VirtualDirectory Name="tvp7002">
<File Name="sys_controller/tvp7002/video_modes.c"/>
<File Name="sys_controller/tvp7002/tvp7002_regs.h"/>
<File Name="sys_controller/tvp7002/video_modes.h"/>
<File Name="sys_controller/tvp7002/tvp7002.h"/>
<File Name="sys_controller/tvp7002/tvp7002.c"/>
</VirtualDirectory>
<File Name="sys_controller/av_controller.c"/>
<File Name="sys_controller/sysconfig.h"/>
</VirtualDirectory>
<Description/>
<Dependencies/>
<Dependencies Name="Debug"/>
<Dependencies Name="Release"/>
<Settings Type="Executable">
<GlobalSettings>
<Compiler Options="" C_Options="" Assembler="">
<IncludePath Value="."/>
</Compiler>
<Linker Options="">
<LibraryPath Value="."/>
</Linker>
<ResourceCompiler Options=""/>
</GlobalSettings>
<Configuration Name="Debug" CompilerType="GCC" DebuggerType="GNU gdb debugger" Type="Executable" BuildCmpWithGlobalSettings="append" BuildLnkWithGlobalSettings="append" BuildResWithGlobalSettings="append">
<Compiler Options="-g" C_Options="-g" Assembler="" Required="yes" PreCompiledHeader="" PCHInCommandLine="no" PCHFlags="" PCHFlagsPolicy="0">
<IncludePath Value="."/>
</Compiler>
<Linker Options="" Required="yes"/>
<ResourceCompiler Options="" Required="no"/>
<General OutputFile="" IntermediateDirectory="./Debug" Command="nios2-download -g --accept-bad-sysid sys_controller.elf &amp;&amp; nios2-terminal" CommandArguments="" UseSeparateDebugArgs="no" DebugArguments="" WorkingDirectory="$(ProjectPath)/sys_controller" PauseExecWhenProcTerminates="yes" IsGUIProgram="no" IsEnabled="yes"/>
<Environment EnvVarSetName="&lt;Use Defaults&gt;" DbgSetName="&lt;Use Defaults&gt;">
<![CDATA[]]>
</Environment>
<Debugger IsRemote="no" RemoteHostName="" RemoteHostPort="" DebuggerPath="" IsExtended="no">
<DebuggerSearchPaths/>
<PostConnectCommands/>
<StartupCommands/>
</Debugger>
<PreBuild/>
<PostBuild/>
<CustomBuild Enabled="yes">
<RebuildCommand/>
<CleanCommand>make clean</CleanCommand>
<BuildCommand>make APP_CFLAGS_DEFINED_SYMBOLS="-DDEBUG"</BuildCommand>
<PreprocessFileCommand/>
<SingleFileCommand/>
<MakefileGenerationCommand/>
<ThirdPartyToolName>None</ThirdPartyToolName>
<WorkingDirectory>$(ProjectPath)/sys_controller</WorkingDirectory>
</CustomBuild>
<AdditionalRules>
<CustomPostBuild/>
<CustomPreBuild/>
</AdditionalRules>
<Completion EnableCpp11="no" EnableCpp14="no">
<ClangCmpFlagsC/>
<ClangCmpFlags/>
<ClangPP/>
<SearchPaths/>
</Completion>
</Configuration>
<Configuration Name="Release" CompilerType="GCC" DebuggerType="GNU gdb debugger" Type="Executable" BuildCmpWithGlobalSettings="append" BuildLnkWithGlobalSettings="append" BuildResWithGlobalSettings="append">
<Compiler Options="" C_Options="" Assembler="" Required="yes" PreCompiledHeader="" PCHInCommandLine="no" PCHFlags="" PCHFlagsPolicy="0">
<IncludePath Value="."/>
</Compiler>
<Linker Options="-O2" Required="yes"/>
<ResourceCompiler Options="" Required="no"/>
<General OutputFile="" IntermediateDirectory="./Release" Command="nios2-download -g --accept-bad-sysid sys_controller.elf" CommandArguments="" UseSeparateDebugArgs="no" DebugArguments="" WorkingDirectory="$(ProjectPath)/sys_controller" PauseExecWhenProcTerminates="no" IsGUIProgram="no" IsEnabled="yes"/>
<Environment EnvVarSetName="&lt;Use Defaults&gt;" DbgSetName="&lt;Use Defaults&gt;">
<![CDATA[]]>
</Environment>
<Debugger IsRemote="no" RemoteHostName="" RemoteHostPort="" DebuggerPath="" IsExtended="no">
<DebuggerSearchPaths/>
<PostConnectCommands/>
<StartupCommands/>
</Debugger>
<PreBuild/>
<PostBuild/>
<CustomBuild Enabled="yes">
<Target Name="compile_image">make mem_init_generate</Target>
<RebuildCommand/>
<CleanCommand>make clean</CleanCommand>
<BuildCommand>make</BuildCommand>
<PreprocessFileCommand/>
<SingleFileCommand/>
<MakefileGenerationCommand/>
<ThirdPartyToolName>None</ThirdPartyToolName>
<WorkingDirectory>$(ProjectPath)/sys_controller</WorkingDirectory>
</CustomBuild>
<AdditionalRules>
<CustomPostBuild/>
<CustomPreBuild/>
</AdditionalRules>
<Completion EnableCpp11="no" EnableCpp14="no">
<ClangCmpFlagsC/>
<ClangCmpFlags/>
<ClangPP/>
<SearchPaths/>
</Completion>
</Configuration>
</Settings>
</CodeLite_Project>

155
software/sys_controller/av_controller.c
View File

@ -1,5 +1,5 @@
//
// Copyright (C) 2015 Markus Hiienkari <mhiienka@niksula.hut.fi>
// Copyright (C) 2015-2016 Markus Hiienkari <mhiienka@niksula.hut.fi>
//
// This file is part of Open Source Scan Converter project.
//
@ -36,7 +36,7 @@
#include "ci_crc.h"
alt_u8 fw_ver_major = 0;
alt_u8 fw_ver_minor = 64;
alt_u8 fw_ver_minor = 67;
#define FW_UPDATE_RETRIES 3
#define LINECNT_THOLD 1
@ -46,10 +46,6 @@ alt_u8 fw_ver_minor = 64;
#define MAINLOOP_SLEEP_US 10000
// AV control word:
// [20:17] [16:13] [12:10] [9:8] [7] [6] [5:4] [3] [2] [1] [0]
// | H_MASK[3:0] | V_MASK[3:0] | SCANLINESTR[2:0] | RESERVED[1:0] | TVP_CLKSEL | SLEN | L3MODE[1:0] | L3EN || BTN3 | BTN2 | BTN1 |
#define SCANLINESTR_MAX 0x07
#define HV_MASK_MAX 0x0f
#define L3_MODE_MAX 3
@ -59,6 +55,8 @@ alt_u8 fw_ver_minor = 64;
#define VIDEO_LPF_MAX 5
#define SAMPLER_PHASE_MIN -16
#define SAMPLER_PHASE_MAX 15
#define SYNC_THOLD_MIN -11
#define SYNC_THOLD_MAX 20
//#define TVP_CLKSEL_BIT (1<<7)
@ -70,7 +68,7 @@ alt_u8 fw_ver_minor = 64;
static const char *rc_keydesc[] = { "1", "2", "3", "MENU", "BACK", "UP", "DOWN", "LEFT", "RIGHT", "INFO", "LCD_BACKLIGHT", "HOTKEY1", "HOTKEY2", "HOTKEY3"};
#define REMOTE_MAX_KEYS (sizeof(rc_keydesc)/sizeof(char*))
alt_u16 rc_keymap[REMOTE_MAX_KEYS] = {0x2088, 0x2048, 0x20c8, 0x2008, 0x20d8, 0x2000, 0x2080, 0x20c0, 0x2040, 0x2058, 0x2010, 0x20e8, 0x2018, 0x2098};
alt_u16 rc_keymap[REMOTE_MAX_KEYS] = {0x3E29, 0x3EA9, 0x3E69, 0x3E4D, 0x3EED, 0x3E2D, 0x3ECD, 0x3EAD, 0x3E6D, 0x3E65, 0x3E01, 0x3EC1, 0x3E41, 0x3EA1};
typedef enum {
RC_BTN1 = 0,
@ -128,12 +126,15 @@ typedef enum {
SAMPLER_480P,
SAMPLER_PHASE,
YPBPR_COLORSPACE,
SYNC_THOLD,
SYNC_LPF,
VIDEO_LPF,
LINETRIPLE_ENABLE,
LINETRIPLE_MODE,
TX_MODE,
#ifndef DEBUG
FW_UPDATE,
#endif
SAVE_CONFIG
} menuitem_id;
@ -162,6 +163,7 @@ typedef struct {
alt_u8 s480p_mode;
alt_8 sampler_phase;
alt_u8 ypbpr_cs;
alt_8 sync_thold;
alt_u8 sync_lpf;
alt_u8 video_lpf;
} avconfig_t;
@ -201,14 +203,15 @@ const menuitem_t menu[] = {
{ SAMPLER_480P, "480p in sampler" },
{ SAMPLER_PHASE, "Sampling phase" },
{ YPBPR_COLORSPACE, "YPbPr in ColSpa" },
{ SYNC_THOLD, "Analog sync thld" },
{ SYNC_LPF, "Analog sync LPF" },
{ VIDEO_LPF, "Video LPF" },
{ LINETRIPLE_ENABLE, "240p linetriple" },
{ LINETRIPLE_ENABLE, "240p/288p lineX3" },
{ LINETRIPLE_MODE, "Linetriple mode" },
{ TX_MODE, "TX mode" },
//#ifndef DEBUG
#ifndef DEBUG
{ FW_UPDATE, "Firmware update" },
//#endif
#endif
{ SAVE_CONFIG, "Save settings" },
};
@ -273,14 +276,8 @@ alt_u8 menu_active, menu_page;
alt_u32 remote_code, remote_code_prev;
alt_u32 btn_code, btn_code_prev;
/*alt_u8 reverse_bits(alt_u8 b) {
b = (b & 0xF0) >> 4 | (b & 0x0F) << 4;
b = (b & 0xCC) >> 2 | (b & 0x33) << 2;
b = (b & 0xAA) >> 1 | (b & 0x55) << 1;
return b;
}*/
int check_flash() {
int check_flash()
{
epcq_controller_dev = &epcq_controller_0;
if ((epcq_controller_dev == NULL) || !(epcq_controller_dev->is_epcs && (epcq_controller_dev->page_size == PAGESIZE)))
@ -291,7 +288,8 @@ int check_flash() {
return 0;
}
int read_flash(alt_u32 offset, alt_u32 length, alt_u8 *dstbuf) {
int read_flash(alt_u32 offset, alt_u32 length, alt_u8 *dstbuf)
{
int retval, i;
retval = alt_epcq_controller_read(&epcq_controller_dev->dev, offset, dstbuf, length);
@ -304,7 +302,8 @@ int read_flash(alt_u32 offset, alt_u32 length, alt_u8 *dstbuf) {
return 0;
}
int write_flash_page(alt_u8 *pagedata, alt_u32 length, alt_u32 pagenum) {
int write_flash_page(alt_u8 *pagedata, alt_u32 length, alt_u32 pagenum)
{
int retval, i;
if ((pagenum % PAGES_PER_SECTOR) == 0) {
@ -336,7 +335,8 @@ int write_flash_page(alt_u8 *pagedata, alt_u32 length, alt_u32 pagenum) {
return retval;
}
int verify_flash(alt_u32 offset, alt_u32 length, alt_u32 golden_crc, alt_u8 *tmpbuf) {
int verify_flash(alt_u32 offset, alt_u32 length, alt_u32 golden_crc, alt_u8 *tmpbuf)
{
alt_u32 crcval=0, i, bytes_to_read;
int retval;
@ -359,7 +359,8 @@ int verify_flash(alt_u32 offset, alt_u32 length, alt_u32 golden_crc, alt_u8 *tmp
return 0;
}
int read_sd_block(alt_u32 offset, alt_u32 size, alt_u8 *dstbuf) {
int read_sd_block(alt_u32 offset, alt_u32 size, alt_u8 *dstbuf)
{
int i;
alt_u32 tmp;
@ -384,7 +385,8 @@ int read_sd_block(alt_u32 offset, alt_u32 size, alt_u8 *dstbuf) {
return 0;
}
int check_sdcard(alt_u8 *databuf) {
int check_sdcard(alt_u8 *databuf)
{
sdcard_dev = alt_up_sd_card_open_dev(ALTERA_UP_SD_CARD_AVALON_INTERFACE_0_NAME);
if ((sdcard_dev == NULL) || !alt_up_sd_card_is_Present()) {
@ -396,7 +398,8 @@ int check_sdcard(alt_u8 *databuf) {
return read_sd_block(0, 512, databuf);
}
int check_fw_header(alt_u8 *databuf, fw_hdr *hdr) {
int check_fw_header(alt_u8 *databuf, fw_hdr *hdr)
{
alt_u32 crcval, tmp;
strncpy(hdr->fw_key, (char*)databuf, 4);
@ -438,7 +441,8 @@ int check_fw_header(alt_u8 *databuf, fw_hdr *hdr) {
return 0;
}
int check_fw_image(alt_u32 offset, alt_u32 size, alt_u32 golden_crc, alt_u8 *tmpbuf) {
int check_fw_image(alt_u32 offset, alt_u32 size, alt_u32 golden_crc, alt_u8 *tmpbuf)
{
alt_u32 crcval=0, i, bytes_to_read;
int retval;
@ -460,7 +464,8 @@ int check_fw_image(alt_u32 offset, alt_u32 size, alt_u32 golden_crc, alt_u8 *tmp
return 0;
}
int fw_update() {
int fw_update()
{
int retval, i;
int retries = FW_UPDATE_RETRIES;
alt_u8 databuf[SD_BUFFER_SIZE];
@ -551,7 +556,8 @@ failure:
return -1;
}
int write_userdata() {
int write_userdata()
{
alt_u8 databuf[PAGESIZE];
int retval;
@ -588,7 +594,8 @@ int write_userdata() {
return 0;
}
int read_userdata() {
int read_userdata()
{
int retval, i;
alt_u8 databuf[PAGESIZE];
userdata_hdr udhdr;
@ -652,7 +659,8 @@ int read_userdata() {
return 0;
}
void setup_rc() {
void setup_rc()
{
int i, confirm;
for (i=0; i<REMOTE_MAX_KEYS; i++) {
@ -692,7 +700,20 @@ void setup_rc() {
}
}
void display_menu(alt_u8 forcedisp) {
inline void TX_enable(tx_mode_t mode)
{
//SetAVMute(TRUE);
if (mode == TX_HDMI) {
EnableVideoOutput(PCLK_MEDIUM, COLOR_RGB444, COLOR_RGB444, 1);
HDMITX_SetAVIInfoFrame(1, F_MODE_RGB444, 0, 0);
} else {
EnableVideoOutput(PCLK_MEDIUM, COLOR_RGB444, COLOR_RGB444, 0);
}
SetAVMute(FALSE);
}
void display_menu(alt_u8 forcedisp)
{
menucode_id code;
int retval;
@ -774,6 +795,13 @@ void display_menu(alt_u8 forcedisp) {
tc.ypbpr_cs = !tc.ypbpr_cs;
strncpy(menu_row2, csc_coeffs[tc.ypbpr_cs].name, LCD_ROW_LEN+1);
break;
case SYNC_THOLD:
if ((code == VAL_MINUS) && (tc.sync_thold > SYNC_THOLD_MIN))
tc.sync_thold--;
else if ((code == VAL_PLUS) && (tc.sync_thold < SYNC_THOLD_MAX))
tc.sync_thold++;
sniprintf(menu_row2, LCD_ROW_LEN+1, "%d mV", ((tc.sync_thold-SYNC_THOLD_MIN)*1127)/100);
break;
case SYNC_LPF:
if ((code == VAL_MINUS) && (tc.sync_lpf > 0))
tc.sync_lpf--;
@ -807,7 +835,7 @@ void display_menu(alt_u8 forcedisp) {
}
sniprintf(menu_row2, LCD_ROW_LEN+1, tc.tx_mode ? "DVI" : "HDMI");
break;
//#ifndef DEBUG
#ifndef DEBUG
case FW_UPDATE:
if ((code == VAL_MINUS) || (code == VAL_PLUS)) {
retval = fw_update();
@ -822,7 +850,7 @@ void display_menu(alt_u8 forcedisp) {
sniprintf(menu_row2, LCD_ROW_LEN+1, "press <- or ->");
}
break;
//#endif
#endif
case SAVE_CONFIG:
if ((code == VAL_MINUS) || (code == VAL_PLUS)) {
retval = write_userdata();
@ -845,7 +873,8 @@ void display_menu(alt_u8 forcedisp) {
return;
}
void read_control() {
void read_control()
{
if (remote_code_prev == 0) {
if (remote_code == rc_keymap[RC_MENU]) {
menu_active = !menu_active;
@ -861,7 +890,7 @@ void read_control() {
} else if (remote_code == rc_keymap[RC_INFO]) {
sniprintf(menu_row1, LCD_ROW_LEN+1, "VMod: %s", video_modes[cm.id].name);
//sniprintf(menu_row1, LCD_ROW_LEN+1, "0x%x 0x%x 0x%x", ths_readreg(THS_CH1), ths_readreg(THS_CH2), ths_readreg(THS_CH3));
sniprintf(menu_row2, LCD_ROW_LEN+1, "LO: %u VSM: %u", IORD_ALTERA_AVALON_PIO_DATA(PIO_4_BASE) & 0xffff, IORD_ALTERA_AVALON_PIO_DATA(PIO_4_BASE) >> 16);
sniprintf(menu_row2, LCD_ROW_LEN+1, "LO: %u VSM: %u", IORD_ALTERA_AVALON_PIO_DATA(PIO_4_BASE) & 0xffff, (IORD_ALTERA_AVALON_PIO_DATA(PIO_4_BASE) >> 16) & 0x3);
lcd_write_menu();
printf("Mod: %s\n", video_modes[cm.id].name);
printf("Lines: %u M: %u\n", IORD_ALTERA_AVALON_PIO_DATA(PIO_4_BASE) & 0xffff, cm.macrovis);
@ -892,7 +921,8 @@ void read_control() {
return;
}
void set_lpf(alt_u8 lpf) {
void set_lpf(alt_u8 lpf)
{
alt_u32 pclk;
pclk = (clkrate[cm.refclk]/cm.clkcnt)*video_modes[cm.id].h_total;
printf("PCLK: %uHz\n", pclk);
@ -927,19 +957,29 @@ void set_lpf(alt_u8 lpf) {
}
// Check if input video status / target configuration has changed
status_t get_status(tvp_input_t input) {
status_t get_status(tvp_input_t input)
{
alt_u32 data1, data2;
alt_u32 totlines, clkcnt;
alt_u8 macrovis, progressive;
alt_u8 refclk;
alt_u8 progressive;
//alt_u8 refclk;
alt_u8 sync_active;
alt_u8 vsyncmode;
alt_u16 fpga_totlines;
status_t status;
static alt_u8 act_ctr;
alt_u32 ctr;
status = NO_CHANGE;
// Wait until vsync active (avoid noise coupled to I2C bus on earlier prototypes)
for (ctr=0; ctr<25000; ctr++) {
if (!(IORD_ALTERA_AVALON_PIO_DATA(PIO_4_BASE) & (1<<31))) {
//printf("ctrval %u\n", ctr);
break;
}
}
sync_active = tvp_check_sync(input);
vsyncmode = IORD_ALTERA_AVALON_PIO_DATA(PIO_4_BASE) >> 16;
@ -1023,6 +1063,9 @@ status_t get_status(tvp_input_t input) {
if (tc.sampler_phase != cm.cc.sampler_phase)
tvp_set_hpll_phase(tc.sampler_phase-SAMPLER_PHASE_MIN);
if (tc.sync_thold != cm.cc.sync_thold)
tvp_set_sog_thold(tc.sync_thold-SYNC_THOLD_MIN);
if (tc.ypbpr_cs != cm.cc.ypbpr_cs)
tvp_sel_csc(&csc_coeffs[tc.ypbpr_cs]);
@ -1043,7 +1086,8 @@ status_t get_status(tvp_input_t input) {
//
// v_info: [31:30] [29] [26:24] [23:13] [15:10] [9:6] [5:0]
// | | V_SCANLINES | V_SCANLINEDIR | V_SCANLINEID | V_SCANLINESTR[2:0] | V_ACTIVE[10:0] | | V_MASK[3:0]| V_BACKPORCH[5:0] |
void set_videoinfo() {
void set_videoinfo()
{
alt_u8 slid_target;
if (video_modes[cm.id].flags & MODE_L3ENABLE_MASK) {
@ -1062,7 +1106,8 @@ void set_videoinfo() {
}
// Configure TVP7002 and scan converter logic based on the video mode
void program_mode() {
void program_mode()
{
alt_u32 data1, data2;
alt_u32 h_hz, v_hz_x100;
@ -1109,19 +1154,9 @@ void program_mode() {
set_videoinfo();
}
inline void TX_enable(tx_mode_t mode) {
//SetAVMute(TRUE);
if (mode == TX_HDMI) {
EnableVideoOutput(PCLK_MEDIUM, COLOR_RGB444, COLOR_RGB444, 1);
HDMITX_SetAVIInfoFrame(1, F_MODE_RGB444, 0, 0);
} else {
EnableVideoOutput(PCLK_MEDIUM, COLOR_RGB444, COLOR_RGB444, 0);
}
SetAVMute(FALSE);
}
// Initialize hardware
int init_hw() {
int init_hw()
{
alt_u32 chiprev;
// Reset error vector and scan converter
@ -1186,13 +1221,15 @@ int init_hw() {
setup_rc();
//enable TX (videogen)
usleep(200000);
TX_enable(cm.cc.tx_mode);
return 0;
}
// Enable chip outputs
void enable_outputs() {
void enable_outputs()
{
// program video mode
program_mode();
// enable TVP output
@ -1205,14 +1242,13 @@ void enable_outputs() {
int main()
{
tvp_input_t target_input;
ths_input_t target_ths;
video_format target_format;
tvp_input_t target_input = 0;
ths_input_t target_ths = 0;
video_format target_format = 0;
avinput_t target_mode;
alt_u8 av_init = 0;
status_t status;
alt_u32 test;
int init_stat;
@ -1221,7 +1257,7 @@ int main()
if (init_stat >= 0) {
printf("### DIY VIDEO DIGITIZER / SCANCONVERTER INIT OK ###\n\n");
sniprintf(row1, LCD_ROW_LEN+1, "OSSC fw. %u.%.2u", fw_ver_major, fw_ver_minor);
strncpy(row2, "2014-2015 marqs", LCD_ROW_LEN+1);
strncpy(row2, "2014-2016 marqs", LCD_ROW_LEN+1);
lcd_write_status();
} else {
sniprintf(row1, LCD_ROW_LEN+1, "Init error %d", init_stat);
@ -1334,7 +1370,8 @@ int main()
lcd_write_status();
}
usleep(MAINLOOP_SLEEP_US);
//usleep(MAINLOOP_SLEEP_US);
usleep(300); //avoid triggering multiple times per vsync
read_control();
if (av_init) {

33
software/sys_controller/it6613/hdmitx_nios2.c
View File

@ -5,34 +5,39 @@
#include "hdmitx.h"
#include "it6613.h"
inline alt_u32 read_it2(alt_u32 regaddr) {
inline alt_u32 read_it2(alt_u32 regaddr)
{
I2C_start(I2CA_BASE, IT_BASE, 0);
I2C_write(I2CA_BASE, regaddr, 0);
I2C_start(I2CA_BASE, IT_BASE, 1);
return I2C_read(I2CA_BASE,1);
}
inline void write_it2(alt_u32 regaddr, alt_u8 data) {
inline void write_it2(alt_u32 regaddr, alt_u8 data)
{
I2C_start(I2CA_BASE, IT_BASE, 0);
I2C_write(I2CA_BASE, regaddr, 0);
I2C_write(I2CA_BASE, data, 1);
}
BYTE I2C_Read_Byte(BYTE Addr,BYTE RegAddr) {
BYTE I2C_Read_Byte(BYTE Addr,BYTE RegAddr)
{
I2C_start(I2CA_BASE, Addr, 0);
I2C_write(I2CA_BASE, RegAddr, 0);
I2C_start(I2CA_BASE, Addr, 1);
return I2C_read(I2CA_BASE,1);
}
SYS_STATUS I2C_Write_Byte(BYTE Addr,BYTE RegAddr,BYTE Data) {
SYS_STATUS I2C_Write_Byte(BYTE Addr,BYTE RegAddr,BYTE Data)
{
I2C_start(I2CA_BASE, Addr, 0);
I2C_write(I2CA_BASE, RegAddr, 0);
I2C_write(I2CA_BASE, Data, 1);
return 0;
}
SYS_STATUS I2C_Read_ByteN(BYTE Addr,BYTE RegAddr,BYTE *pData,int N) {
SYS_STATUS I2C_Read_ByteN(BYTE Addr,BYTE RegAddr,BYTE *pData,int N)
{
int i;
for (i=0; i<N; i++)
@ -41,7 +46,8 @@ SYS_STATUS I2C_Read_ByteN(BYTE Addr,BYTE RegAddr,BYTE *pData,int N) {
return 0;
}
SYS_STATUS I2C_Write_ByteN(BYTE Addr,BYTE RegAddr,BYTE *pData,int N) {
SYS_STATUS I2C_Write_ByteN(BYTE Addr,BYTE RegAddr,BYTE *pData,int N)
{
int i;
for (i=0; i<N; i++)
@ -50,16 +56,19 @@ SYS_STATUS I2C_Write_ByteN(BYTE Addr,BYTE RegAddr,BYTE *pData,int N) {
return 0;
}
BYTE HDMITX_ReadI2C_Byte(BYTE RegAddr) {
BYTE HDMITX_ReadI2C_Byte(BYTE RegAddr)
{
return read_it2(RegAddr);
}
SYS_STATUS HDMITX_WriteI2C_Byte(BYTE RegAddr,BYTE val) {
SYS_STATUS HDMITX_WriteI2C_Byte(BYTE RegAddr,BYTE val)
{
write_it2(RegAddr, val);
return 0;
}
SYS_STATUS HDMITX_ReadI2C_ByteN(BYTE RegAddr,BYTE *pData,int N) {
SYS_STATUS HDMITX_ReadI2C_ByteN(BYTE RegAddr,BYTE *pData,int N)
{
int i;
for (i=0; i<N; i++)
@ -68,7 +77,8 @@ SYS_STATUS HDMITX_ReadI2C_ByteN(BYTE RegAddr,BYTE *pData,int N) {
return 0;
}
SYS_STATUS HDMITX_WriteI2C_ByteN(BYTE RegAddr,BYTE *pData,int N) {
SYS_STATUS HDMITX_WriteI2C_ByteN(BYTE RegAddr,BYTE *pData,int N)
{
int i;
for (i=0; i<N; i++)
@ -77,6 +87,7 @@ SYS_STATUS HDMITX_WriteI2C_ByteN(BYTE RegAddr,BYTE *pData,int N) {
return 0;
}
void DelayMS(unsigned int ms) {
void DelayMS(unsigned int ms)
{
usleep(1000*ms);
}

1586
software/sys_controller/mem_init/sys_onchip_memory2_0.hex
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File diff suppressed because it is too large Load Diff

8
software/sys_controller/spi_charlcd/lcd.c
View File

@ -1,5 +1,5 @@
//
// Copyright (C) 2015 Markus Hiienkari <mhiienka@niksula.hut.fi>
// Copyright (C) 2015-2016 Markus Hiienkari <mhiienka@niksula.hut.fi>
//
// This file is part of Open Source Scan Converter project.
//
@ -27,7 +27,8 @@
#define WRDELAY 20
#define CLEARDELAY 800
void lcd_init() {
void lcd_init()
{
alt_u8 lcd_ctrl = 0x00;
IOWR_ALTERA_AVALON_PIO_DATA(PIO_5_BASE, lcd_ctrl);
usleep(WRDELAY);
@ -57,7 +58,8 @@ void lcd_init() {
IOWR_ALTERA_AVALON_PIO_DATA(PIO_5_BASE, lcd_ctrl);
}
void lcd_write(char *row1, char *row2) {
void lcd_write(char *row1, char *row2)
{
alt_u8 i, rowlen;
alt_u8 lcd_ctrl = 0x00;

2
software/sys_controller/spi_charlcd/lcd.h
View File

@ -1,5 +1,5 @@
//
// Copyright (C) 2015 Markus Hiienkari <mhiienka@niksula.hut.fi>
// Copyright (C) 2015-2016 Markus Hiienkari <mhiienka@niksula.hut.fi>
//
// This file is part of Open Source Scan Converter project.
//

2
software/sys_controller/sysconfig.h
View File

@ -1,5 +1,5 @@
//
// Copyright (C) 2015 Markus Hiienkari <mhiienka@niksula.hut.fi>
// Copyright (C) 2015-2016 Markus Hiienkari <mhiienka@niksula.hut.fi>
//
// This file is part of Open Source Scan Converter project.
//

17
software/sys_controller/ths7353/ths7353.c
View File

@ -1,5 +1,5 @@
//
// Copyright (C) 2015 Markus Hiienkari <mhiienka@niksula.hut.fi>
// Copyright (C) 2015-2016 Markus Hiienkari <mhiienka@niksula.hut.fi>
//
// This file is part of Open Source Scan Converter project.
//
@ -24,7 +24,8 @@
#include "i2c_opencores.h"
#include "ths7353.h"
inline alt_u32 ths_readreg(alt_u8 channel) {
inline alt_u32 ths_readreg(alt_u8 channel)
{
//Phase 1
I2C_start(I2CA_BASE, THS_BASE, 0);
I2C_write(I2CA_BASE, channel, 1);
@ -34,13 +35,15 @@ inline alt_u32 ths_readreg(alt_u8 channel) {
return I2C_read(I2CA_BASE,1);
}
inline void ths_writereg(alt_u8 channel, alt_u8 data) {
inline void ths_writereg(alt_u8 channel, alt_u8 data)
{
I2C_start(I2CA_BASE, THS_BASE, 0);
I2C_write(I2CA_BASE, channel, 0);
I2C_write(I2CA_BASE, data, 1);
}
int ths_init() {
int ths_init()
{
//Avoid random FIFO state (see datasheet p.37)
I2C_write(I2CA_BASE, 0x00, 0);
usleep(10);
@ -53,7 +56,8 @@ int ths_init() {
return (ths_readreg(THS_CH1) == (THS_LPF_DEFAULT<<THS_LPF_OFFS));
}
void ths_set_lpf(alt_u8 val) {
void ths_set_lpf(alt_u8 val)
{
alt_u8 status = ths_readreg(THS_CH1) & ~THS_LPF_MASK;
status |= (val<<THS_LPF_OFFS);
@ -63,7 +67,8 @@ void ths_set_lpf(alt_u8 val) {
printf("THS LPF value set to 0x%x\n", val);
}
void ths_source_sel(ths_input_t input, alt_u8 lpf) {
void ths_source_sel(ths_input_t input, alt_u8 lpf)
{
alt_u8 status = ths_readreg(THS_CH1) & ~(THS_SRC_MASK|THS_MODE_MASK);
//alt_u8 status = 0x00;

2
software/sys_controller/ths7353/ths7353.h
View File

@ -1,5 +1,5 @@
//
// Copyright (C) 2015 Markus Hiienkari <mhiienka@niksula.hut.fi>
// Copyright (C) 2015-2016 Markus Hiienkari <mhiienka@niksula.hut.fi>
//
// This file is part of Open Source Scan Converter project.
//

71
software/sys_controller/tvp7002/tvp7002.c
View File

@ -1,5 +1,5 @@
//
// Copyright (C) 2015 Markus Hiienkari <mhiienka@niksula.hut.fi>
// Copyright (C) 2015-2016 Markus Hiienkari <mhiienka@niksula.hut.fi>
//
// This file is part of Open Source Scan Converter project.
//
@ -40,16 +40,19 @@ const ypbpr_to_rgb_csc_t csc_coeffs[] = {
extern mode_data_t video_modes[];
static inline void tvp_set_hpllcoast(alt_u8 pre, alt_u8 post) {
static inline void tvp_set_hpllcoast(alt_u8 pre, alt_u8 post)
{
tvp_writereg(TVP_HPLLPRECOAST, pre);
tvp_writereg(TVP_HPLLPOSTCOAST, post);
}
static inline void tvp_set_ssthold(alt_u8 vsdetect_thold) {
static inline void tvp_set_ssthold(alt_u8 vsdetect_thold)
{
tvp_writereg(TVP_SSTHOLD, vsdetect_thold);
}
static void tvp_set_clamp(video_format fmt) {
static void tvp_set_clamp(video_format fmt)
{
switch (fmt) {
case FORMAT_RGBS:
case FORMAT_RGBHV:
@ -66,7 +69,8 @@ static void tvp_set_clamp(video_format fmt) {
}
}
static void tvp_set_clamp_position(video_type type) {
static void tvp_set_clamp_position(video_type type)
{
switch (type) {
case VIDEO_LDTV:
tvp_writereg(TVP_CLAMPSTART, 0x2);
@ -87,7 +91,8 @@ static void tvp_set_clamp_position(video_type type) {
}
}
static void tvp_set_alc(video_type type) {
static void tvp_set_alc(video_type type)
{
//disable ALC
//tvp_writereg(TVP_ALCEN, 0x00);
//tvp_writereg(TVP_ALCEN, 0x80);
@ -120,20 +125,23 @@ static void tvp_set_alc(video_type type) {
}
inline alt_u32 tvp_readreg(alt_u32 regaddr) {
inline alt_u32 tvp_readreg(alt_u32 regaddr)
{
I2C_start(I2CA_BASE, TVP_BASE, 0);
I2C_write(I2CA_BASE, regaddr, 1); //don't use repeated start as it seems unreliable at 400kHz
I2C_start(I2CA_BASE, TVP_BASE, 1);
return I2C_read(I2CA_BASE,1);
}
inline void tvp_writereg(alt_u32 regaddr, alt_u8 data) {
inline void tvp_writereg(alt_u32 regaddr, alt_u8 data)
{
I2C_start(I2CA_BASE, TVP_BASE, 0);
I2C_write(I2CA_BASE, regaddr, 0);
I2C_write(I2CA_BASE, data, 1);
}
inline void tvp_reset() {
inline void tvp_reset()
{
usleep(10000);
IOWR_ALTERA_AVALON_PIO_DATA(PIO_0_BASE, 0x00);
usleep(10000);
@ -141,7 +149,8 @@ inline void tvp_reset() {
usleep(10000);
}
inline void tvp_disable_output() {
inline void tvp_disable_output()
{
usleep(10000);
tvp_writereg(TVP_MISCCTRL1, 0x13);
usleep(10000);
@ -149,7 +158,8 @@ inline void tvp_disable_output() {
usleep(10000);
}
inline void tvp_enable_output() {
inline void tvp_enable_output()
{
usleep(10000);
tvp_writereg(TVP_MISCCTRL1, 0x11);
usleep(10000);
@ -157,7 +167,8 @@ inline void tvp_enable_output() {
usleep(10000);
}
void tvp_init() {
void tvp_init()
{
// disable output
tvp_disable_output();
@ -189,7 +200,8 @@ void tvp_init() {
}
// Configure H-PLL (sampling rate, VCO gain and charge pump current)
void tvp_setup_hpll(alt_u16 h_samplerate, alt_u16 v_lines, alt_u8 hz, alt_u8 plldivby2) {
void tvp_setup_hpll(alt_u16 h_samplerate, alt_u16 v_lines, alt_u8 hz, alt_u8 plldivby2)
{
alt_u32 pclk_est;
alt_u8 vco_range;
alt_u8 cp_current;
@ -224,12 +236,15 @@ void tvp_setup_hpll(alt_u16 h_samplerate, alt_u16 v_lines, alt_u8 hz, alt_u8 pll
}
cp_current = (40*Kvco[vco_range]+h_samplerate/2) / h_samplerate; //"+h_samplerate/2" for fast rounding
if (cp_current > 7)
cp_current = 7;
printf("VCO range: %s\nCPC: %u\n", Kvco_str[vco_range], cp_current);
tvp_writereg(TVP_HPLLCTRL, ((vco_range << 6) | (cp_current << 3)));
}
void tvp_sel_clk(alt_u8 refclk) {
void tvp_sel_clk(alt_u8 refclk)
{
alt_u8 status = tvp_readreg(TVP_INPMUX2) & 0xFA;
//TODO: set SOG and CLP LPF based on mode
@ -244,7 +259,8 @@ void tvp_sel_clk(alt_u8 refclk) {
}
}
void tvp_sel_csc(ypbpr_to_rgb_csc_t *csc) {
void tvp_sel_csc(ypbpr_to_rgb_csc_t *csc)
{
tvp_writereg(TVP_CSC1HI, (csc->G_Y >> 8));
tvp_writereg(TVP_CSC1LO, (csc->G_Y & 0xff));
tvp_writereg(TVP_CSC2HI, (csc->G_Pb >> 8));
@ -267,25 +283,36 @@ void tvp_sel_csc(ypbpr_to_rgb_csc_t *csc) {
tvp_writereg(TVP_CSC9LO, (csc->B_Pr & 0xff));
}
void tvp_set_lpf(alt_u8 val) {
void tvp_set_lpf(alt_u8 val)
{
alt_u8 status = tvp_readreg(TVP_VIDEOBWLIM) & 0xF0;
tvp_writereg(TVP_VIDEOBWLIM, status|val);
printf("TVP LPF value set to 0x%x\n", val);
}
void tvp_set_sync_lpf(alt_u8 val) {
void tvp_set_sync_lpf(alt_u8 val)
{
alt_u8 status = tvp_readreg(TVP_INPMUX2) & 0x3F;
tvp_writereg(TVP_INPMUX2, status|((3-val)<<6));
printf("Sync LPF value set to 0x%x\n", (3-val));
}
void tvp_set_hpll_phase(alt_u8 val) {
void tvp_set_hpll_phase(alt_u8 val)
{
alt_u8 status = tvp_readreg(TVP_HPLLPHASE) & 0x07;
tvp_writereg(TVP_HPLLPHASE, (val<<3)|status);
printf("Phase value set to 0x%x\n", val);
}
void tvp_source_setup(alt_8 modeid, video_type type, alt_u32 vlines, alt_u8 hz, alt_u8 refclk) {
void tvp_set_sog_thold(alt_u8 val)
{
alt_u8 status = tvp_readreg(TVP_SOGTHOLD) & 0x07;
tvp_writereg(TVP_SOGTHOLD, (val<<3)|status);
printf("SOG thold set to 0x%x\n", val);
}
void tvp_source_setup(alt_8 modeid, video_type type, alt_u32 vlines, alt_u8 hz, alt_u8 refclk)
{
// Configure clock settings
tvp_sel_clk(refclk);
@ -328,7 +355,8 @@ void tvp_source_setup(alt_8 modeid, video_type type, alt_u32 vlines, alt_u8 hz,
tvp_writereg(TVP_HSOUTWIDTH, video_modes[modeid].h_synclen);
}
void tvp_source_sel(tvp_input_t input, video_format fmt, alt_u8 refclk) {
void tvp_source_sel(tvp_input_t input, video_format fmt, alt_u8 refclk)
{
alt_u8 sync_status;
alt_u8 sog_ch;
@ -388,7 +416,8 @@ void tvp_source_sel(tvp_input_t input, video_format fmt, alt_u8 refclk) {
printf("\n");
}
alt_u8 tvp_check_sync(tvp_input_t input) {
alt_u8 tvp_check_sync(tvp_input_t input)
{
alt_u8 sync_status;
sync_status = tvp_readreg(TVP_SYNCSTAT);

4
software/sys_controller/tvp7002/tvp7002.h
View File

@ -1,5 +1,5 @@
//
// Copyright (C) 2015 Markus Hiienkari <mhiienka@niksula.hut.fi>
// Copyright (C) 2015-2016 Markus Hiienkari <mhiienka@niksula.hut.fi>
//
// This file is part of Open Source Scan Converter project.
//
@ -81,6 +81,8 @@ void tvp_set_sync_lpf(alt_u8 val);
void tvp_set_hpll_phase(alt_u8 val);
void tvp_set_sog_thold(alt_u8 val);
void tvp_source_setup(alt_8 modeid, video_type type, alt_u32 vlines, alt_u8 hz, alt_u8 refclk);
void tvp_source_sel(tvp_input_t input, video_format fmt, alt_u8 refclk);

2
software/sys_controller/tvp7002/tvp7002_regs.h
View File

@ -1,5 +1,5 @@
//
// Copyright (C) 2015 Markus Hiienkari <mhiienka@niksula.hut.fi>
// Copyright (C) 2015-2016 Markus Hiienkari <mhiienka@niksula.hut.fi>
//
// This file is part of Open Source Scan Converter project.
//

25
software/sys_controller/tvp7002/video_modes.c
View File

@ -1,5 +1,5 @@
//
// Copyright (C) 2015 Markus Hiienkari <mhiienka@niksula.hut.fi>
// Copyright (C) 2015-2016 Markus Hiienkari <mhiienka@niksula.hut.fi>
//
// This file is part of Open Source Scan Converter project.
//
@ -25,32 +25,37 @@
#define LINECNT_MAX_TOLERANCE 30
const mode_data_t video_modes[] = {
{ "240p_L3M0", 1280, 240, 6000, 1704, 262, 196, 16, 124, 3, (VIDEO_SDTV|VIDEO_PC), MODE_L3_MODE0 },
{ "240p_L3M1", 960, 240, 6000, 1278, 262, 147, 16, 93, 3, (VIDEO_SDTV|VIDEO_PC), MODE_L3_MODE1 },
{ "240p_L3M0", 1280, 240, 6000, 1704, 262, 196, 16, 124, 3, (VIDEO_SDTV|VIDEO_PC), (MODE_L3_MODE0) },
{ "240p_L3M1", 960, 240, 6000, 1278, 262, 147, 16, 93, 3, (VIDEO_SDTV|VIDEO_PC), (MODE_L3_MODE1|MODE_PLLDIVBY2) },
{ "240p_L3M2", 320, 240, 6000, 426, 262, 49, 16, 31, 3, (VIDEO_LDTV|VIDEO_PC), (MODE_L3_MODE2|MODE_PLLDIVBY2) },
{ "240p_L3M3", 256, 240, 6000, 341, 262, 39, 16, 25, 3, (VIDEO_LDTV|VIDEO_PC), (MODE_L3_MODE3|MODE_PLLDIVBY2) },
{ "240p", 720, 240, 6000, 858, 262, 65, 16, 60, 3, (VIDEO_SDTV|VIDEO_PC), (MODE_L2ENABLE) },
{ "288p", 720, 288, 5000, 864, 312, 65, 16, 60, 3, (VIDEO_SDTV|VIDEO_PC), (MODE_L2ENABLE) },
{ "384p", 496, 384, 5766, 640, 423, 50, 29, 62, 3, VIDEO_EDTV, (MODE_L2ENABLE) }, //Sega Model 2
{ "240p", 720, 240, 6000, 858, 262, 65, 16, 60, 3, (VIDEO_SDTV|VIDEO_PC), (MODE_L2ENABLE|MODE_PLLDIVBY2) },
{ "288p_L3M0", 1280, 288, 5000, 1704, 312, 196, 16, 124, 3, (VIDEO_SDTV|VIDEO_PC), (MODE_L3_MODE0) },
{ "288p_L3M1", 960, 288, 5000, 1278, 312, 147, 16, 93, 3, (VIDEO_SDTV|VIDEO_PC), (MODE_L3_MODE1|MODE_PLLDIVBY2) },
{ "288p_L3M2", 320, 240, 5000, 426, 312, 49, 41, 31, 3, (VIDEO_LDTV|VIDEO_PC), (MODE_L3_MODE2|MODE_PLLDIVBY2) },
{ "288p_L3M3", 256, 240, 5000, 341, 312, 39, 41, 25, 3, (VIDEO_LDTV|VIDEO_PC), (MODE_L3_MODE3|MODE_PLLDIVBY2) },
{ "288p", 720, 288, 5000, 864, 312, 65, 16, 60, 3, (VIDEO_SDTV|VIDEO_PC), (MODE_L2ENABLE|MODE_PLLDIVBY2) },
{ "384p", 496, 384, 5766, 640, 423, 50, 29, 62, 3, VIDEO_EDTV, (MODE_L2ENABLE|MODE_PLLDIVBY2) }, //Sega Model 2
{ "640x384", 640, 384, 5500, 800, 492, 48, 63, 96, 2, VIDEO_PC, (MODE_L2ENABLE) }, //X68k @ 24kHz
{ "480i", 720, 240, 5994, 858, 525, 65, 16, 60, 3, (VIDEO_SDTV|VIDEO_PC), (MODE_L2ENABLE|MODE_INTERLACED) },
{ "480i", 720, 240, 5994, 858, 525, 65, 16, 60, 3, (VIDEO_SDTV|VIDEO_PC), (MODE_L2ENABLE|MODE_PLLDIVBY2|MODE_INTERLACED) },
{ "480p", 720, 480, 5994, 858, 525, 60, 30, 62, 6, (VIDEO_EDTV|VIDEO_PC), (MODE_DTV480P) },
{ "640x480", 640, 480, 6000, 800, 525, 48, 33, 96, 2, (VIDEO_PC|VIDEO_EDTV), (MODE_VGA480P) },
{ "640x512", 640, 512, 6000, 800, 568, 48, 28, 96, 2, VIDEO_PC, 0 }, //X68k @ 31kHz
{ "576i", 720, 288, 5000, 864, 625, 65, 16, 60, 3, (VIDEO_SDTV|VIDEO_PC), (MODE_L2ENABLE|MODE_INTERLACED) },
{ "576i", 720, 288, 5000, 864, 625, 65, 16, 60, 3, (VIDEO_SDTV|VIDEO_PC), (MODE_L2ENABLE|MODE_PLLDIVBY2|MODE_INTERLACED) },
{ "576p", 720, 576, 5000, 864, 625, 65, 32, 60, 6, VIDEO_EDTV, 0 },
{ "800x600", 800, 600, 6000, 1056, 628, 88, 23, 128, 4, VIDEO_PC, 0 },
{ "720p", 1280, 720, 5994, 1650, 750, 255, 20, 40, 5, VIDEO_HDTV, 0 },
{ "1280x720", 1280, 720, 6000, 1650, 750, 220, 20, 40, 5, VIDEO_PC, 0 },
{ "1024x768", 1024, 768, 6000, 1344, 806, 160, 29, 136, 6, VIDEO_PC, 0 },
{ "1280x1024", 1280, 1024, 6000, 1688, 1066, 248, 38, 112, 3, VIDEO_PC, 0 },
{ "1080i", 1920, 1080, 5994, 2200, 1125, 148, 16, 44, 5, VIDEO_HDTV, (MODE_L2ENABLE|MODE_INTERLACED) }, //Too high freq for L2 PLL
{ "1080i", 1920, 1080, 5994, 2200, 1125, 148, 16, 44, 5, VIDEO_HDTV, (MODE_INTERLACED) }, //Too high freq for L2 PLL
{ "1080p", 1920, 1080, 5994, 2200, 1125, 188, 36, 44, 5, VIDEO_HDTV, 0 },
{ "1920x1080", 1920, 1080, 6000, 2200, 1125, 148, 36, 44, 5, VIDEO_PC, 0 },
};
/* TODO: rewrite, check hz etc. */
alt_8 get_mode_id(alt_u32 totlines, alt_u8 progressive, alt_u32 hz, video_type typemask, alt_u8 linemult_target, alt_u8 l3_mode, alt_u8 s480p_mode) {
alt_8 get_mode_id(alt_u32 totlines, alt_u8 progressive, alt_u32 hz, video_type typemask, alt_u8 linemult_target, alt_u8 l3_mode, alt_u8 s480p_mode)
{
alt_8 i;
alt_u8 num_modes = sizeof(video_modes)/sizeof(mode_data_t);
video_type mode_type;

2
software/sys_controller/tvp7002/video_modes.h
View File

@ -1,5 +1,5 @@
//
// Copyright (C) 2015 Markus Hiienkari <mhiienka@niksula.hut.fi>
// Copyright (C) 2015-2016 Markus Hiienkari <mhiienka@niksula.hut.fi>
//
// This file is part of Open Source Scan Converter project.
//

BIN
software/sys_controller_bsp/libhal_bsp.a
View File

Binary file not shown.

8
software/sys_controller_bsp/settings.bsp
View File

@ -2,10 +2,10 @@
<sch:Settings xmlns:sch="http://www.altera.com/embeddedsw/bsp/schema">
<BspType>hal</BspType>
<BspVersion>default</BspVersion>
<BspGeneratedTimeStamp>Feb 18, 2016 1:07:07 AM</BspGeneratedTimeStamp>
<BspGeneratedUnixTimeStamp>1455750427597</BspGeneratedUnixTimeStamp>
<BspGeneratedLocation>./</BspGeneratedLocation>
<BspSettingsFile>../sys_controller_bsp/settings.bsp</BspSettingsFile>
<BspGeneratedTimeStamp>Mar 22, 2016 7:43:08 PM</BspGeneratedTimeStamp>
<BspGeneratedUnixTimeStamp>1458668588222</BspGeneratedUnixTimeStamp>
<BspGeneratedLocation>/home/markus/Code/ossc/software/sys_controller_bsp</BspGeneratedLocation>
<BspSettingsFile>settings.bsp</BspSettingsFile>
<SopcDesignFile>../../sys.sopcinfo</SopcDesignFile>
<JdiFile>default</JdiFile>
<Cpu>nios2_qsys_0</Cpu>

4
sys.sopcinfo
View File

@ -1,11 +1,11 @@
<?xml version="1.0" encoding="UTF-8"?>
<EnsembleReport name="sys" kind="sys" version="1.0" fabric="QSYS">
<!-- Format version 15.1 185 (Future versions may contain additional information.) -->
<!-- 2016.01.19.23:41:47 -->
<!-- 2016.03.22.19:30:46 -->
<!-- A collection of modules and connections -->
<parameter name="AUTO_GENERATION_ID">
<type>java.lang.Integer</type>
<value>1453239707</value>
<value>1458667846</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>

112
tools.project Normal file
View File

@ -0,0 +1,112 @@
<?xml version="1.0" encoding="UTF-8"?>
<CodeLite_Project Name="tools" InternalType="">
<Plugins>
<Plugin Name="CMakePlugin">
<![CDATA[[{
"name": "Release",
"enabled": false,
"buildDirectory": "build",
"sourceDirectory": "$(ProjectPath)",
"generator": "",
"buildType": "",
"arguments": [],
"parentProject": ""
}]]]>
</Plugin>
<Plugin Name="qmake">
<![CDATA[00010001N0007Release000000000000]]>
</Plugin>
</Plugins>
<Description/>
<Dependencies/>
<VirtualDirectory Name="tools">
<File Name="tools/create_fw_img.c"/>
</VirtualDirectory>
<Settings Type="Executable">
<GlobalSettings>
<Compiler Options="" C_Options="" Assembler="">
<IncludePath Value="."/>
</Compiler>
<Linker Options="">
<LibraryPath Value="."/>
</Linker>
<ResourceCompiler Options=""/>
</GlobalSettings>
<Configuration Name="Debug" CompilerType="GCC" DebuggerType="GNU gdb debugger" Type="Dynamic Library" BuildCmpWithGlobalSettings="append" BuildLnkWithGlobalSettings="append" BuildResWithGlobalSettings="append">
<Compiler Options="-g" C_Options="-g" Assembler="" Required="yes" PreCompiledHeader="" PCHInCommandLine="no" PCHFlags="" PCHFlagsPolicy="0">
<IncludePath Value="."/>
</Compiler>
<Linker Options="" Required="yes"/>
<ResourceCompiler Options="" Required="no"/>
<General OutputFile="" IntermediateDirectory="./Debug" Command="" CommandArguments="" UseSeparateDebugArgs="no" DebugArguments="" WorkingDirectory="$(IntermediateDirectory)" PauseExecWhenProcTerminates="yes" IsGUIProgram="no" IsEnabled="yes"/>
<Environment EnvVarSetName="&lt;Use Defaults&gt;" DbgSetName="&lt;Use Defaults&gt;">
<![CDATA[]]>
</Environment>
<Debugger IsRemote="no" RemoteHostName="" RemoteHostPort="" DebuggerPath="" IsExtended="no">
<DebuggerSearchPaths/>
<PostConnectCommands/>
<StartupCommands/>
</Debugger>
<PreBuild/>
<PostBuild/>
<CustomBuild Enabled="yes">
<RebuildCommand/>
<CleanCommand>make clean</CleanCommand>
<BuildCommand>make</BuildCommand>
<PreprocessFileCommand/>
<SingleFileCommand/>
<MakefileGenerationCommand/>
<ThirdPartyToolName>None</ThirdPartyToolName>
<WorkingDirectory>$(WorkspacePath)</WorkingDirectory>
</CustomBuild>
<AdditionalRules>
<CustomPostBuild/>
<CustomPreBuild/>
</AdditionalRules>
<Completion EnableCpp11="no" EnableCpp14="no">
<ClangCmpFlagsC/>
<ClangCmpFlags/>
<ClangPP/>
<SearchPaths/>
</Completion>
</Configuration>
<Configuration Name="Release" CompilerType="GCC" DebuggerType="GNU gdb debugger" Type="Executable" BuildCmpWithGlobalSettings="append" BuildLnkWithGlobalSettings="append" BuildResWithGlobalSettings="append">
<Compiler Options="" C_Options="" Assembler="" Required="yes" PreCompiledHeader="" PCHInCommandLine="no" PCHFlags="" PCHFlagsPolicy="0">
<IncludePath Value="."/>
</Compiler>
<Linker Options="-O2" Required="yes"/>
<ResourceCompiler Options="" Required="no"/>
<General OutputFile="$(IntermediateDirectory)/fw2" IntermediateDirectory="tools" Command="" CommandArguments="" UseSeparateDebugArgs="no" DebugArguments="" WorkingDirectory="$(IntermediateDirectory)" PauseExecWhenProcTerminates="yes" IsGUIProgram="no" IsEnabled="yes"/>
<Environment EnvVarSetName="&lt;Use Defaults&gt;" DbgSetName="&lt;Use Defaults&gt;">
<![CDATA[]]>
</Environment>
<Debugger IsRemote="no" RemoteHostName="" RemoteHostPort="" DebuggerPath="" IsExtended="no">
<DebuggerSearchPaths/>
<PostConnectCommands/>
<StartupCommands/>
</Debugger>
<PreBuild/>
<PostBuild/>
<CustomBuild Enabled="no">
<RebuildCommand/>
<CleanCommand>make clean</CleanCommand>
<BuildCommand>make</BuildCommand>
<PreprocessFileCommand/>
<SingleFileCommand/>
<MakefileGenerationCommand/>
<ThirdPartyToolName>None</ThirdPartyToolName>
<WorkingDirectory>$(ProjectPath)</WorkingDirectory>
</CustomBuild>
<AdditionalRules>
<CustomPostBuild/>
<CustomPreBuild/>
</AdditionalRules>
<Completion EnableCpp11="no" EnableCpp14="no">
<ClangCmpFlagsC/>
<ClangCmpFlags/>
<ClangPP/>
<SearchPaths/>
</Completion>
</Configuration>
</Settings>
</CodeLite_Project>

22
tools/create_fw_img.c
View File

@ -1,3 +1,22 @@
//
// Copyright (C) 2015-2016 Markus Hiienkari <mhiienka@niksula.hut.fi>
//
// This file is part of Open Source Scan Converter project.
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program. If not, see <http://www.gnu.org/licenses/>.
//
#include <stdio.h>
#include <stdint.h>
#include <string.h>
@ -62,8 +81,7 @@ static uint32_t crc32_tab[] = {
0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d
};
uint32_t
crc32(uint32_t crc, const void *buf, size_t size)
uint32_t crc32(uint32_t crc, const void *buf, size_t size)
{
const uint8_t *p;