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r65emu
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cosmetic changes

This commit is contained in:
Stephen Crane 2014-11-10 14:16:45 +00:00
parent 0c87474d58
commit 5e5116229b
12 changed files with 393 additions and 388 deletions
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69
acia.h
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@ -1,39 +1,40 @@
/* #ifndef __ACIA_H__
* acia.h -- ACIA device #define __ACIA_H__
*/
struct acia { struct acia {
// status bits returned by operator byte
//
static const byte rdrf = 1 << 0;
static const byte tdre = 1 << 1;
static const byte dcd = 1 << 2;
static const byte cts = 1 << 3;
static const byte fe = 1 << 4;
static const byte ovrn = 1 << 5;
static const byte pc = 1 << 6;
static const byte irq = 1 << 7;
// control operations (four combinable groups)
//
static const byte cd1 = 0x00; // divide by 1
static const byte cd16 = 0x01; // divide by 16
static const byte cd64 = 0x02; // divide by 64
static const byte reset = 0x03; // master reset
static const byte ws7e2 = 0 << 2; // parity // status bits returned by operator byte
static const byte ws7o2 = 1 << 2; //
static const byte ws7e1 = 2 << 2; static const byte rdrf = 1 << 0;
static const byte ws7o1 = 3 << 2; static const byte tdre = 1 << 1;
static const byte ws8n2 = 4 << 2; static const byte dcd = 1 << 2;
static const byte ws8n1 = 5 << 2; static const byte cts = 1 << 3;
static const byte ws8e1 = 6 << 2; static const byte fe = 1 << 4;
static const byte ws8o1 = 7 << 2; static const byte ovrn = 1 << 5;
static const byte pc = 1 << 6;
static const byte irq = 1 << 7;
static const byte lrts_dti = 0 << 5; // /rts, disable trans irq // control operations (four combinable groups)
static const byte lrts_eti = 1 << 5; // /rts, enable //
static const byte hrts_dti = 2 << 5; // rts, disable static const byte cd1 = 0x00; // divide by 1
static const byte lrts_dti_brk = 3 << 5; // /rts, disable, send brk static const byte cd16 = 0x01; // divide by 16
static const byte cd64 = 0x02; // divide by 64
static const byte reset = 0x03; // master reset
static const byte ws7e2 = 0 << 2; // parity
static const byte ws7o2 = 1 << 2;
static const byte ws7e1 = 2 << 2;
static const byte ws7o1 = 3 << 2;
static const byte ws8n2 = 4 << 2;
static const byte ws8n1 = 5 << 2;
static const byte ws8e1 = 6 << 2;
static const byte ws8o1 = 7 << 2;
static const byte eri = 1 << 7; // enable receive interrupt static const byte lrts_dti = 0 << 5; // /rts, disable trans irq
static const byte lrts_eti = 1 << 5; // /rts, enable
static const byte hrts_dti = 2 << 5; // rts, disable
static const byte lrts_dti_brk = 3 << 5; // /rts, disable, send brk
static const byte eri = 1 << 7; // enable receive interrupt
}; };
#endif

7
cpu.h
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@ -1,8 +1,5 @@
/* #ifndef __CPU_H__
* cpu.h #define __CPU_H__
*/
#ifndef _CPU_H
#define _CPU_H
#ifndef _SETJMP_H #ifndef _SETJMP_H
#include <setjmp.h> #include <setjmp.h>

12
hardware.h
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@ -2,8 +2,8 @@
* The hardware configuration of the machine. * The hardware configuration of the machine.
* (This should be the same for all emulated devices.) * (This should be the same for all emulated devices.)
*/ */
#ifndef __HARDWARE_H #ifndef __HARDWARE_H__
#define __HARDWARE_H #define __HARDWARE_H__
// TFT display... // TFT display...
// NOTE: edit memorysaver.h to select the correct chip for your display! // NOTE: edit memorysaver.h to select the correct chip for your display!
@ -41,9 +41,17 @@ void hardware_init(class CPU &);
void hardware_checkpoint(class Stream &); void hardware_checkpoint(class Stream &);
void hardware_restore(class Stream &); void hardware_restore(class Stream &);
#ifdef __PS2DRV_H__
extern class PS2Driver ps2; extern class PS2Driver ps2;
#endif
#ifdef __SPIRAM_H__
extern class spiram sram; extern class spiram sram;
#endif
#ifdef UTFT_h
extern class UTFT utft; extern class UTFT utft;
#endif
#ifdef __MEMORY_H__
extern class Memory memory; extern class Memory memory;
#endif
#endif #endif

4
keyboard.h
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@ -1,5 +1,5 @@
#ifndef _KEYBOARD_H #ifndef __KEYBOARD_H__
#define _KEYBOARD_H #define __KEYBOARD_H__
class Keyboard { class Keyboard {
public: public:

7
memory.h
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@ -1,8 +1,5 @@
/* #ifndef __MEMORY_H__
* memory.h #define __MEMORY_H__
*/
#ifndef _MEMORY_H
#define _MEMORY_H
typedef unsigned char byte; typedef unsigned char byte;

5
prom.h
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@ -1,3 +1,6 @@
#ifndef __PROM_H__
#define __PROM_H__
class prom: public Memory::Device { class prom: public Memory::Device {
public: public:
virtual void operator= (byte) {} virtual void operator= (byte) {}
@ -8,3 +11,5 @@ public:
private: private:
const byte *_mem; const byte *_mem;
}; };
#endif

76
ps2drv.h
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@ -1,46 +1,46 @@
#ifndef __PS2DRV_H #ifndef __PS2DRV_H__
#define __PS2DRV_H #define __PS2DRV_H__
class PS2Driver class PS2Driver
{ {
public: public:
PS2Driver() {} PS2Driver() {}
/** /**
* Starts the keyboard "service" by registering the external interrupt. * Starts the keyboard "service" by registering the external interrupt.
* setting the pin modes correctly and driving those needed to high. * setting the pin modes correctly and driving those needed to high.
* The propably best place to call this method is in the setup routine. * The propably best place to call this method is in the setup routine.
*/ */
void begin(uint8_t dataPin, uint8_t irq_pin); void begin(uint8_t dataPin, uint8_t irq_pin);
/** /**
* Returns true if there is a char to be read, false if not. * Returns true if there is a char to be read, false if not.
*/ */
bool available(); bool available();
/** /**
* returns true if the key has been released * returns true if the key has been released
*/ */
bool isbreak(); bool isbreak();
/** /**
* Returns the scancode last received from the keyboard. * Returns the scancode last received from the keyboard.
* If there is no char available, -1 is returned. * If there is no char available, -1 is returned.
*/ */
int read(); int read();
}; };
#define PS2_F1 0x05 #define PS2_F1 0x05
#define PS2_F2 0x06 #define PS2_F2 0x06
#define PS2_F3 0x04 #define PS2_F3 0x04
#define PS2_F4 0x0C #define PS2_F4 0x0C
#define PS2_F5 0x03 #define PS2_F5 0x03
#define PS2_F6 0x0B #define PS2_F6 0x0B
#define PS2_F7 0x83 #define PS2_F7 0x83
#define PS2_F8 0x0A #define PS2_F8 0x0A
#define PS2_F9 0x01 #define PS2_F9 0x01
#define PS2_F10 0x09 #define PS2_F10 0x09
#define PS2_F11 0x78 #define PS2_F11 0x78
#define PS2_F12 0x07 #define PS2_F12 0x07
#endif #endif

585
r6502.h
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@ -1,316 +1,313 @@
/* #ifndef __R6502_H__
* r6502.h #define __R6502_H__
*/
#ifndef _R6502_H
#define _R6502_H
#undef PC #undef PC
class Stream; class Stream;
class r6502: public CPU { class r6502: public CPU {
public: public:
void raise(int); void raise(int);
void reset(); void reset();
Memory::address run(unsigned); Memory::address run(unsigned);
char *status(); char *status();
void checkpoint(Stream &); void checkpoint(Stream &);
void restore(Stream &); void restore(Stream &);
r6502 (Memory *, jmp_buf *, CPU::statfn); r6502 (Memory *, jmp_buf *, CPU::statfn);
private: private:
/* registers */ /* registers */
Memory::address PC; Memory::address PC;
byte S, A, X, Y; byte S, A, X, Y;
byte N, V, B, D, I, Z, C; byte N, V, B, D, I, Z, C;
union { union {
struct { struct {
unsigned C:1; unsigned C:1;
unsigned Z:1; unsigned Z:1;
unsigned I:1; unsigned I:1;
unsigned D:1; unsigned D:1;
unsigned B:1; unsigned B:1;
unsigned _:1; // unused unsigned _:1; // unused
unsigned V:1; unsigned V:1;
unsigned N:1; unsigned N:1;
} bits; } bits;
byte value; byte value;
} P; } P;
byte _toBCD[256], _fromBCD[256]; // BCD maps byte _toBCD[256], _fromBCD[256]; // BCD maps
bool _irq; // interrupt pending bool _irq; // interrupt pending?
void irq(); void irq();
void nmi(); void nmi();
byte flags(); byte flags();
/* stack */ /* stack */
inline void pusha (Memory::address ret) { inline void pusha (Memory::address ret) {
(*_memory)[0x0100+S--] = ret >> 8; (*_memory)[0x0100+S--] = ret >> 8;
(*_memory)[0x0100+S--] = ret & 0xff; (*_memory)[0x0100+S--] = ret & 0xff;
} }
inline void pushb (byte b) { inline void pushb (byte b) {
(*_memory)[0x0100+S--] = b; (*_memory)[0x0100+S--] = b;
} }
inline byte popb () { inline byte popb () {
return (*_memory)[++S+0x0100]; return (*_memory)[++S+0x0100];
} }
inline Memory::address popa () { inline Memory::address popa () {
byte b = popb (); byte b = popb ();
return ((popb () << 8) | b); return ((popb () << 8) | b);
} }
static const Memory::address nmivec = 0xfffa; static const Memory::address nmivec = 0xfffa;
static const Memory::address resvec = 0xfffc; static const Memory::address resvec = 0xfffc;
static const Memory::address ibvec = 0xfffe; static const Memory::address ibvec = 0xfffe;
inline Memory::address vector(Memory::address v) { inline Memory::address vector(Memory::address v) {
return ((*_memory)[v+1] << 8) | (*_memory)[v]; return ((*_memory)[v+1] << 8) | (*_memory)[v];
} }
/* operators */ /* operators */
inline void _cmp (byte a) { Z=N=A-a; C=(A>=a); } inline void _cmp (byte a) { Z=N=A-a; C=(A>=a); }
inline void _cpx (byte a) { Z=N=X-a; C=(X>=a); } inline void _cpx (byte a) { Z=N=X-a; C=(X>=a); }
inline void _cpy (byte a) { Z=N=Y-a; C=(Y>=a); } inline void _cpy (byte a) { Z=N=Y-a; C=(Y>=a); }
inline void _and (byte a) { Z=N=A&=a; } inline void _and (byte a) { Z=N=A&=a; }
inline void _eor (byte a) { Z=N=A^=a; } inline void _eor (byte a) { Z=N=A^=a; }
inline void _ora (byte a) { Z=N=A|=a; } inline void _ora (byte a) { Z=N=A|=a; }
inline void _lda (byte a) { Z=N=A=a; } inline void _lda (byte a) { Z=N=A=a; }
inline void _ldx (byte a) { Z=N=X=a; } inline void _ldx (byte a) { Z=N=X=a; }
inline void _ldy (byte a) { Z=N=Y=a; } inline void _ldy (byte a) { Z=N=Y=a; }
/* modes */ /* modes */
inline Memory::address _a () { inline Memory::address _a () {
Memory::address a = (*_memory)[PC++]; Memory::address a = (*_memory)[PC++];
return a | ((*_memory)[PC++] << 8); return a | ((*_memory)[PC++] << 8);
} }
inline Memory::address _ax () { return _a()+X; } inline Memory::address _ax () { return _a()+X; }
inline Memory::address _ay () { return _a()+Y; } inline Memory::address _ay () { return _a()+Y; }
inline Memory::address _z () { return (*_memory)[PC++]; } inline Memory::address _z () { return (*_memory)[PC++]; }
inline Memory::address _zx () { return (_z()+X) & 0xff; } inline Memory::address _zx () { return (_z()+X) & 0xff; }
inline Memory::address _zy () { return (_z()+Y) & 0xff; } inline Memory::address _zy () { return (_z()+Y) & 0xff; }
inline Memory::address _i (Memory::address a) { inline Memory::address _i (Memory::address a) {
return ((*_memory)[a+1]<<8)|(*_memory)[a]; return ((*_memory)[a+1]<<8)|(*_memory)[a];
} }
inline Memory::address _ix () { return _i(_zx()); } inline Memory::address _ix () { return _i(_zx()); }
inline Memory::address _iy () { return _i((*_memory)[PC++])+Y; } inline Memory::address _iy () { return _i((*_memory)[PC++])+Y; }
void _adc (byte a); void _adc (byte a);
void _sbc (byte a) { if (P.bits.D) sbcd(a); else _adc(~a); } void _sbc (byte a) { if (P.bits.D) sbcd(a); else _adc(~a); }
void sbcd (byte a); void sbcd (byte a);
inline byte __ror (byte b) { inline byte __ror (byte b) {
N=b>>1; if (C) N|=0x80; C=b&1; return Z=N; N=b>>1; if (C) N|=0x80; C=b&1; return Z=N;
} }
inline void _ror (Memory::address a) { inline void _ror (Memory::address a) {
(*_memory)[a] = __ror((*_memory)[a]); (*_memory)[a] = __ror((*_memory)[a]);
} }
inline byte __rol (byte b) { inline byte __rol (byte b) {
N=b<<1; if (C) N|=1; C=(b&0x80)!=0; return Z=N; N=b<<1; if (C) N|=1; C=(b&0x80)!=0; return Z=N;
} }
inline void _rol (Memory::address a) { inline void _rol (Memory::address a) {
(*_memory)[a] = __rol((*_memory)[a]); (*_memory)[a] = __rol((*_memory)[a]);
} }
inline byte __asl (byte b) { C=(b&0x80)!=0; return Z=N=b<<1; } inline byte __asl (byte b) { C=(b&0x80)!=0; return Z=N=b<<1; }
inline void _asl (Memory::address a) { inline void _asl (Memory::address a) {
(*_memory)[a] = __asl((*_memory)[a]); (*_memory)[a] = __asl((*_memory)[a]);
} }
inline byte __lsr (byte b) { C=b&1; Z=b>>1; N=0; return Z; } inline byte __lsr (byte b) { C=b&1; Z=b>>1; N=0; return Z; }
inline void _lsr (Memory::address a) { inline void _lsr (Memory::address a) {
(*_memory)[a] = __lsr((*_memory)[a]); (*_memory)[a] = __lsr((*_memory)[a]);
} }
inline void _inc (Memory::address a) { inline void _inc (Memory::address a) {
Z=N=1+(*_memory)[a]; (*_memory)[a]=Z; Z=N=1+(*_memory)[a]; (*_memory)[a]=Z;
} }
inline void _dec (Memory::address a) { inline void _dec (Memory::address a) {
Z=N=(*_memory)[a]-1; (*_memory)[a]=Z; Z=N=(*_memory)[a]-1; (*_memory)[a]=Z;
} }
inline void _bit (byte z) { V=((z & 0x40)!=0); N=(z & 0x80); Z=(A & z); } inline void _bit (byte z) { V=((z & 0x40)!=0); N=(z & 0x80); Z=(A & z); }
inline void _bra() { inline void _bra() {
byte b = (*_memory)[PC]; byte b = (*_memory)[PC];
PC += b; PC += b;
if (b > 127) PC -= 0x0100; if (b > 127) PC -= 0x0100;
} }
/* dispatch table */ /* dispatch table */
typedef void (r6502::*OP)(); OP _ops[256]; typedef void (r6502::*OP)(); OP _ops[256];
/* operations */ /* operations */
void brk (); void brk ();
void ora_ix () { _ora ((*_memory)[_ix()]); } void ora_ix () { _ora ((*_memory)[_ix()]); }
void ill (); void ill ();
void nop2 () { PC++; } void nop2 () { PC++; }
void ora_z () { _ora ((*_memory)[_z()]); } void ora_z () { _ora ((*_memory)[_z()]); }
void asl_z () { _asl (_z()); } void asl_z () { _asl (_z()); }
void php (); void php ();
void ora_ () { _ora ((*_memory)[PC++]); } void ora_ () { _ora ((*_memory)[PC++]); }
void asl () { C=(A&0x80)!=0; Z=N=A<<=1; } void asl () { C=(A&0x80)!=0; Z=N=A<<=1; }
void nop3 () { PC+=2; } void nop3 () { PC+=2; }
void ora_a () { _ora ((*_memory)[_a()]); } void ora_a () { _ora ((*_memory)[_a()]); }
void asl_a () { _asl (_a()); } void asl_a () { _asl (_a()); }
// 10 // 10
void bpl () { if (!(N & 0x80)) _bra(); PC++; } void bpl () { if (!(N & 0x80)) _bra(); PC++; }
void ora_iy () { _ora ((*_memory)[_iy()]); } void ora_iy () { _ora ((*_memory)[_iy()]); }
void ora_zx () { _ora ((*_memory)[_zx()]); } void ora_zx () { _ora ((*_memory)[_zx()]); }
void asl_zx () { _asl (_zx()); } void asl_zx () { _asl (_zx()); }
void clc () { C=0; } void clc () { C=0; }
void ora_ay () { _ora ((*_memory)[_ay()]); } void ora_ay () { _ora ((*_memory)[_ay()]); }
void nop () { } void nop () { }
void ora_ax () { _ora ((*_memory)[_ax()]); } void ora_ax () { _ora ((*_memory)[_ax()]); }
void asl_ax () { _asl (_ax()); } void asl_ax () { _asl (_ax()); }
// 20 // 20
void jsr (); void jsr ();
void and_ix () { _and ((*_memory)[_ix()]); } void and_ix () { _and ((*_memory)[_ix()]); }
void bit_z () { _bit ((*_memory)[_z()]); } void bit_z () { _bit ((*_memory)[_z()]); }
void and_z () { _and ((*_memory)[_z()]); } void and_z () { _and ((*_memory)[_z()]); }
void rol_z () { _rol (_z()); } void rol_z () { _rol (_z()); }
void plp (); void plp ();
void and_ () { _and ((*_memory)[PC++]); } void and_ () { _and ((*_memory)[PC++]); }
void rol () { A=__rol (A); } void rol () { A=__rol (A); }
void bit_a () { _bit ((*_memory)[_a()]); } void bit_a () { _bit ((*_memory)[_a()]); }
void and_a () { _and ((*_memory)[_a()]); } void and_a () { _and ((*_memory)[_a()]); }
void rol_a () { _rol (_a()); } void rol_a () { _rol (_a()); }
// 30 // 30
void bmi () { if (N & 0x80) _bra(); PC++; } void bmi () { if (N & 0x80) _bra(); PC++; }
void and_iy () { _and ((*_memory)[_iy()]); } void and_iy () { _and ((*_memory)[_iy()]); }
void and_zx () { _and ((*_memory)[_zx()]); } void and_zx () { _and ((*_memory)[_zx()]); }
void rol_zx () { _rol (_zx()); } void rol_zx () { _rol (_zx()); }
void sec () { C=1; } void sec () { C=1; }
void and_ay () { _and ((*_memory)[_ay()]); } void and_ay () { _and ((*_memory)[_ay()]); }
void and_ax () { _and ((*_memory)[_ax()]); } void and_ax () { _and ((*_memory)[_ax()]); }
void rol_ax () { _rol (_ax()); } void rol_ax () { _rol (_ax()); }
// 40 // 40
void rti (); void rti ();
void eor_ix () { _eor ((*_memory)[_ix()]); } void eor_ix () { _eor ((*_memory)[_ix()]); }
void eor_z () { _eor ((*_memory)[_z()]); } void eor_z () { _eor ((*_memory)[_z()]); }
void lsr_z () { _lsr (_z()); } void lsr_z () { _lsr (_z()); }
void pha () { pushb (A); } void pha () { pushb (A); }
void eor_ () { _eor ((*_memory)[PC++]); } void eor_ () { _eor ((*_memory)[PC++]); }
void lsr_ () { A=__lsr(A); } void lsr_ () { A=__lsr(A); }
void jmp () { PC = _a (); } void jmp () { PC = _a (); }
void eor_a () { _eor ((*_memory)[_a()]); } void eor_a () { _eor ((*_memory)[_a()]); }
void lsr_a () { _lsr (_a()); } void lsr_a () { _lsr (_a()); }
// 50 // 50
void bvc () { if (!V) _bra(); PC++; } void bvc () { if (!V) _bra(); PC++; }
void eor_iy () { _eor ((*_memory)[_iy()]); } void eor_iy () { _eor ((*_memory)[_iy()]); }
void eor_zx () { _eor ((*_memory)[_zx()]); } void eor_zx () { _eor ((*_memory)[_zx()]); }
void lsr_zx () { _lsr (_zx()); } void lsr_zx () { _lsr (_zx()); }
void cli (); void cli ();
void eor_ay () { _eor ((*_memory)[_ay()]); } void eor_ay () { _eor ((*_memory)[_ay()]); }
void eor_ax () { _eor ((*_memory)[_ax()]); } void eor_ax () { _eor ((*_memory)[_ax()]); }
void lsr_ax () { _lsr (_ax()); } void lsr_ax () { _lsr (_ax()); }
// 60 // 60
void rts (); void rts ();
void adc_ix () { _adc ((*_memory)[_ix()]); } void adc_ix () { _adc ((*_memory)[_ix()]); }
void adc_z () { _adc ((*_memory)[_z()]); } void adc_z () { _adc ((*_memory)[_z()]); }
void ror_z () { _ror (_z()); } void ror_z () { _ror (_z()); }
void pla () { Z=N=A=popb (); } void pla () { Z=N=A=popb (); }
void adc_ () { _adc ((*_memory)[PC++]); } void adc_ () { _adc ((*_memory)[PC++]); }
void ror_ () { A=__ror (A); } void ror_ () { A=__ror (A); }
void jmp_i () { PC = _i(_a()); } void jmp_i () { PC = _i(_a()); }
void adc_a () { _adc ((*_memory)[_a()]); } void adc_a () { _adc ((*_memory)[_a()]); }
void ror_a () { _ror (_a()); } void ror_a () { _ror (_a()); }
// 70 // 70
void bvs () { if (V) _bra(); PC++; } void bvs () { if (V) _bra(); PC++; }
void adc_iy () { _adc ((*_memory)[_iy()]); } void adc_iy () { _adc ((*_memory)[_iy()]); }
void adc_zx () { _adc ((*_memory)[_zx()]); } void adc_zx () { _adc ((*_memory)[_zx()]); }
void ror_zx () { _ror (_zx ()); } void ror_zx () { _ror (_zx ()); }
void sei () { P.bits.I = 1; } void sei () { P.bits.I = 1; }
void adc_ay () { _adc ((*_memory)[_ay()]); } void adc_ay () { _adc ((*_memory)[_ay()]); }
void adc_ax () { _adc ((*_memory)[_ax()]); } void adc_ax () { _adc ((*_memory)[_ax()]); }
void ror_ax () { _ror (_ax ()); } void ror_ax () { _ror (_ax ()); }
// 80 // 80
void sta_ix () { (*_memory)[_ix()] = A; } void sta_ix () { (*_memory)[_ix()] = A; }
void sty_z () { (*_memory)[_z()] = Y; } void sty_z () { (*_memory)[_z()] = Y; }
void sta_z () { (*_memory)[_z()] = A; } void sta_z () { (*_memory)[_z()] = A; }
void stx_z () { (*_memory)[_z()] = X; } void stx_z () { (*_memory)[_z()] = X; }
void dey () { Z=N=--Y; } void dey () { Z=N=--Y; }
void txa () { Z=N=A=X; } void txa () { Z=N=A=X; }
void sty_a () { (*_memory)[_a()] = Y; } void sty_a () { (*_memory)[_a()] = Y; }
void sta_a () { (*_memory)[_a()] = A; } void sta_a () { (*_memory)[_a()] = A; }
void stx_a () { (*_memory)[_a()] = X; } void stx_a () { (*_memory)[_a()] = X; }
// 90 // 90
void bcc () { if (!C) _bra(); PC++; } void bcc () { if (!C) _bra(); PC++; }
void sta_iy () { (*_memory)[_iy()] = A; } void sta_iy () { (*_memory)[_iy()] = A; }
void sty_zx () { (*_memory)[_zx()] = Y; } void sty_zx () { (*_memory)[_zx()] = Y; }
void sta_zx () { (*_memory)[_zx()] = A; } void sta_zx () { (*_memory)[_zx()] = A; }
void stx_zy () { (*_memory)[_zy()] = X; } void stx_zy () { (*_memory)[_zy()] = X; }
void tya () { Z=N=A=Y; } void tya () { Z=N=A=Y; }
void sta_ay () { (*_memory)[_ay()] = A; } void sta_ay () { (*_memory)[_ay()] = A; }
void txs () { S=X; } void txs () { S=X; }
void sta_ax () { (*_memory)[_ax()] = A; } void sta_ax () { (*_memory)[_ax()] = A; }
// a0 // a0
void ldy_ () { _ldy ((*_memory)[PC++]); } void ldy_ () { _ldy ((*_memory)[PC++]); }
void lda_ix () { _lda ((*_memory)[_ix()]); } void lda_ix () { _lda ((*_memory)[_ix()]); }
void ldx_ () { _ldx ((*_memory)[PC++]); } void ldx_ () { _ldx ((*_memory)[PC++]); }
void lax_ix () { lda_ix (); X=A; } void lax_ix () { lda_ix (); X=A; }
void ldy_z () { _ldy ((*_memory)[_z()]); } void ldy_z () { _ldy ((*_memory)[_z()]); }
void lda_z () { _lda ((*_memory)[_z()]); } void lda_z () { _lda ((*_memory)[_z()]); }
void ldx_z () { _ldx ((*_memory)[_z()]); } void ldx_z () { _ldx ((*_memory)[_z()]); }
void lax_z () { lda_z (); X=A; } void lax_z () { lda_z (); X=A; }
void tay () { Z=N=Y=A; } void tay () { Z=N=Y=A; }
void lda_ () { _lda ((*_memory)[PC++]); } void lda_ () { _lda ((*_memory)[PC++]); }
void tax () { Z=N=X=A; } void tax () { Z=N=X=A; }
void ldy_a () { _ldy ((*_memory)[_a()]); } void ldy_a () { _ldy ((*_memory)[_a()]); }
void lda_a () { _lda ((*_memory)[_a()]); } void lda_a () { _lda ((*_memory)[_a()]); }
void ldx_a () { _ldx ((*_memory)[_a()]); } void ldx_a () { _ldx ((*_memory)[_a()]); }
void lax_a () { lda_a (); X=A; } void lax_a () { lda_a (); X=A; }
// b0 // b0
void bcs () { if (C) _bra(); PC++; } void bcs () { if (C) _bra(); PC++; }
void lda_iy () { _lda ((*_memory)[_iy()]); } void lda_iy () { _lda ((*_memory)[_iy()]); }
void lax_iy () { lda_iy (); X=A; } void lax_iy () { lda_iy (); X=A; }
void ldy_zx () { _ldy ((*_memory)[_zx()]); } void ldy_zx () { _ldy ((*_memory)[_zx()]); }
void lda_zx () { _lda ((*_memory)[_zx()]); } void lda_zx () { _lda ((*_memory)[_zx()]); }
void ldx_zy () { _ldx ((*_memory)[_zy()]); } void ldx_zy () { _ldx ((*_memory)[_zy()]); }
void lax_zy () { ldx_zy (); A=X; } void lax_zy () { ldx_zy (); A=X; }
void clv () { V=0; } void clv () { V=0; }
void lda_ay () { _lda ((*_memory)[_ay()]); } void lda_ay () { _lda ((*_memory)[_ay()]); }
void tsx () { Z=N=X=S; } void tsx () { Z=N=X=S; }
void ldy_ax () { _ldy ((*_memory)[_ax()]); } void ldy_ax () { _ldy ((*_memory)[_ax()]); }
void lda_ax () { _lda ((*_memory)[_ax()]); } void lda_ax () { _lda ((*_memory)[_ax()]); }
void ldx_ay () { _ldx ((*_memory)[_ay()]); } void ldx_ay () { _ldx ((*_memory)[_ay()]); }
void lax_ay () { ldx_ay (); A=X; } void lax_ay () { ldx_ay (); A=X; }
// c0 // c0
void cpy_ () { _cpy ((*_memory)[PC++]); } void cpy_ () { _cpy ((*_memory)[PC++]); }
void cmp_ix () { _cmp ((*_memory)[_ix()]); } void cmp_ix () { _cmp ((*_memory)[_ix()]); }
void cpy_z () { _cpy ((*_memory)[_z()]); } void cpy_z () { _cpy ((*_memory)[_z()]); }
void cmp_z () { _cmp ((*_memory)[_z()]); } void cmp_z () { _cmp ((*_memory)[_z()]); }
void dec_z () { _dec (_z()); } void dec_z () { _dec (_z()); }
void iny () { Z=N=++Y; } void iny () { Z=N=++Y; }
void cmp_ () { _cmp ((*_memory)[PC++]); } void cmp_ () { _cmp ((*_memory)[PC++]); }
void dex () { Z=N=--X; } void dex () { Z=N=--X; }
void cpy_a () { _cpy ((*_memory)[_a()]); } void cpy_a () { _cpy ((*_memory)[_a()]); }
void cmp_a () { _cmp ((*_memory)[_a()]); } void cmp_a () { _cmp ((*_memory)[_a()]); }
void dec_a () { _dec (_a()); } void dec_a () { _dec (_a()); }
// d0 // d0
void bne () { if (Z) _bra(); PC++; } void bne () { if (Z) _bra(); PC++; }
void cmp_iy () { _cmp ((*_memory)[_iy()]); } void cmp_iy () { _cmp ((*_memory)[_iy()]); }
void cmp_zx () { _cmp ((*_memory)[_zx()]); } void cmp_zx () { _cmp ((*_memory)[_zx()]); }
void dec_zx () { _dec (_zx()); } void dec_zx () { _dec (_zx()); }
void cld () { P.bits.D = 0; } void cld () { P.bits.D = 0; }
void cmp_ay () { _cmp ((*_memory)[_ay()]); } void cmp_ay () { _cmp ((*_memory)[_ay()]); }
void cmp_ax () { _cmp ((*_memory)[_ax()]); } void cmp_ax () { _cmp ((*_memory)[_ax()]); }
void dec_ax () { _dec (_ax()); } void dec_ax () { _dec (_ax()); }
// e0 // e0
void cpx_ () { _cpx ((*_memory)[PC++]); } void cpx_ () { _cpx ((*_memory)[PC++]); }
void sbc_ix () { _sbc ((*_memory)[_ix()]); } void sbc_ix () { _sbc ((*_memory)[_ix()]); }
void cpx_z () { _cpx ((*_memory)[_z()]); } void cpx_z () { _cpx ((*_memory)[_z()]); }
void sbc_z () { _sbc ((*_memory)[_z()]); } void sbc_z () { _sbc ((*_memory)[_z()]); }
void inc_z () { _inc (_z()); } void inc_z () { _inc (_z()); }
void inx () { Z=N=++X; } void inx () { Z=N=++X; }
void sbc_ () { _sbc ((*_memory)[PC++]); } void sbc_ () { _sbc ((*_memory)[PC++]); }
void cpx_a () { _cpx ((*_memory)[_a()]); } void cpx_a () { _cpx ((*_memory)[_a()]); }
void sbc_a () { _sbc ((*_memory)[_a()]); } void sbc_a () { _sbc ((*_memory)[_a()]); }
void inc_a () { _inc (_a()); } void inc_a () { _inc (_a()); }
// f0 // f0
void beq () { if (!Z) _bra(); PC++; } void beq () { if (!Z) _bra(); PC++; }
void sbc_iy () { _sbc ((*_memory)[_iy()]); } void sbc_iy () { _sbc ((*_memory)[_iy()]); }
void sbc_zx () { _sbc ((*_memory)[_zx()]); } void sbc_zx () { _sbc ((*_memory)[_zx()]); }
void inc_zx () { _inc (_zx()); } void inc_zx () { _inc (_zx()); }
void sed () { P.bits.D = 1; } void sed () { P.bits.D = 1; }
void sbc_ay () { _sbc ((*_memory)[_ay()]); } void sbc_ay () { _sbc ((*_memory)[_ay()]); }
void sbc_ax () { _sbc ((*_memory)[_ax()]); } void sbc_ax () { _sbc ((*_memory)[_ax()]); }
void inc_ax () { _inc (_ax()); } void inc_ax () { _inc (_ax()); }
}; };
#endif #endif

4
r65emu.h
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@ -1,5 +1,5 @@
#ifndef _R65EMU_H #ifndef __R65EMU_H__
#define _R65EMU_H #define __R65EMU_H__
#include "memory.h" #include "memory.h"
#include "cpu.h" #include "cpu.h"

4
ram.h
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@ -1,5 +1,5 @@
#ifndef _RAM_H #ifndef __RAM_H__
#define _RAM_H #define __RAM_H__
class ram: public Memory::Device { class ram: public Memory::Device {
public: public:

4
sdtape.h
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@ -1,5 +1,5 @@
#ifndef _SDTAPE_H #ifndef __SDTAPE_H__
#define _SDTAPE_H #define __SDTAPE_H__
class sdtape { class sdtape {
public: public:

4
utftdisplay.h
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@ -1,5 +1,5 @@
#ifndef _UTFT_DISPLAY_H #ifndef __UTFT_DISPLAY_H__
#define _UTFT_DISPLAY_H #define __UTFT_DISPLAY_H__
class Stream; class Stream;