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Emulate invalid instructions.

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Treat them as NOPs of different length just as real 65C02.
This commit is contained in:
Radosław Kujawa 2018-04-10 13:56:37 +02:00
parent f0471947fc
commit d0728c8ade
3 changed files with 61 additions and 58 deletions
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88
src/65c02isa.csv
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@ -1,8 +1,8 @@
opcode_id,mnemonic,addressing,size,emulation,modify_pc
OP_BRK,"brk",IMPLIED,2,emul_brk,true
OP_ORA_IZPX,"ora",IZPX,2,emul_ora,false
OP_NOPI_3,"invalid",IMMEDIATE,2,NULL,false
OP_NOPI_4,"invalid",IMPLIED,1,NULL,false
OP_NOPI_3,"invalid",IMMEDIATE,2,emul_invalid,false
OP_NOPI_4,"invalid",IMPLIED,1,emul_invalid,false
OP_TSB_ZP,"tsb",ZP,2,emul_tsb,false
OP_ORA_ZP,"ora",ZP,2,emul_ora,false
OP_ASL_ZP,"asl",ZP,2,emul_asl,false
@ -10,7 +10,7 @@ OP_RMB0_ZP,"rmb0",ZP,2,emul_rmb0,false
OP_PHP,"php",IMPLIED,1,emul_php,false
OP_ORA_IMM,"ora",IMMEDIATE,2,emul_ora,false
OP_ASL,"asl",ACCUMULATOR,1,emul_asl,false
OP_NOPI_C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_C,"invalid",IMPLIED,1,emul_invalid,false
OP_TSB_ABS,"tsb",ABSOLUTE,3,emul_tsb,false
OP_ORA_ABS,"ora",ABSOLUTE,3,emul_ora,false
OP_ASL_ABS,"asl",ABSOLUTE,3,emul_asl,false
@ -18,7 +18,7 @@ OP_BBR0_REL,"bbr0",ZPR,2,emul_bbr0,true
OP_BPL_REL,"bpl",RELATIVE,2,emul_bpl,true
OP_ORA_IZPY,"ora",IZPY,2,emul_ora,false
OP_ORA_IZP,"ora",IZP,2,emul_ora,false
OP_NOPI_14,"invalid",IMPLIED,1,NULL,false
OP_NOPI_14,"invalid",IMPLIED,1,emul_invalid,false
OP_TRB_ZP,"trb",ZP,2,emul_trb,false
OP_ORA_ZPX,"ora",ZPX,2,emul_ora,false
OP_ASL_ZPX,"asl",ZPX,2,emul_asl,false
@ -26,15 +26,15 @@ OP_RMB1_ZP,"rmb1",ZP,2,emul_rmb1,false
OP_CLC,"clc",IMPLIED,1,emul_clc,false
OP_ORA_ABSY,"ora",ABSOLUTEY,3,emul_ora,false
OP_INC,"inc",ACCUMULATOR,1,emul_inc,false
OP_NOPI_1C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_1C,"invalid",IMPLIED,1,emul_invalid,false
OP_TRB_ABS,"trb",ABSOLUTE,3,emul_trb,false
OP_ORA_ABSX,"ora",ABSOLUTEX,3,emul_ora,false
OP_ASL_ABSX,"asl",ABSOLUTEX,3,emul_asl,false
OP_BBR1_REL,"bbr1",ZPR,2,emul_bbr1,true
OP_JSR,"jsr",ABSOLUTE,3,emul_jsr,true
OP_AND_IZPX,"and",IZPX,2,emul_and,false
OP_NOPI_23,"invalid",IMMEDIATE,2,NULL,false
OP_NOPI_24,"invalid",IMPLIED,1,NULL,false
OP_NOPI_23,"invalid",IMMEDIATE,2,emul_invalid,false
OP_NOPI_24,"invalid",IMPLIED,1,emul_invalid,false
OP_BIT_ZP,"bit",ZP,2,emul_bit,false
OP_AND_ZP,"and",ZP,2,emul_and,false
OP_ROL_ZP,"rol",ZP,2,emul_rol,false
@ -42,7 +42,7 @@ OP_RMB2_ZP,"rmb2",ZP,2,emul_rmb2,false
OP_PLP,"plp",IMPLIED,1,emul_plp,false
OP_AND_IMM,"and",IMMEDIATE,2,emul_and,false
OP_ROL,"rol",ACCUMULATOR,1,emul_rol,false
OP_NOPI_2C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_2C,"invalid",IMPLIED,1,emul_invalid,false
OP_BIT_ABS,"bit",ABSOLUTE,3,emul_bit,false
OP_AND_ABS,"and",ABSOLUTE,3,emul_and,false
OP_ROL_ABS,"rol",ABSOLUTE,3,emul_rol,false
@ -50,7 +50,7 @@ OP_BBR2_REL,"bbr2",ZPR,2,emul_bbr2,true
OP_BMI_REL,"bmi",RELATIVE,2,emul_bmi,true
OP_AND_IZPY,"and",IZPY,2,emul_and,false
OP_AND_IZP,"and",IZP,2,emul_and,false
OP_NOPI_34,"invalid",IMPLIED,1,NULL,false
OP_NOPI_34,"invalid",IMPLIED,1,emul_invalid,false
OP_BIT_ZPX,"bit",ZPX,2,emul_bit,false
OP_AND_ZPX,"and",ZPX,2,emul_and,false
OP_ROL_ZPX,"rol",ZPX,2,emul_rol,false
@ -58,23 +58,23 @@ OP_RMB3_ZP,"rmb3",ZP,2,emul_rmb3,false
OP_SEC,"sec",IMPLIED,1,emul_sec,false
OP_AND_ABSY,"and",ABSOLUTEY,3,emul_and,false
OP_DEC,"dec",ACCUMULATOR,1,emul_dec,false
OP_NOPI_3C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_3C,"invalid",IMPLIED,1,emul_invalid,false
OP_BIT_ABSX,"bit",ABSOLUTEX,3,emul_bit,false
OP_AND_ABSX,"and",ABSOLUTEX,3,emul_and,false
OP_ROL_ABSX,"rol",ABSOLUTEX,3,emul_rol,false
OP_BBR3_REL,"bbr3",ZPR,2,emul_bbr3,true
OP_RTI,"rti",IMPLIED,1,emul_rti,true
OP_EOR_IZPX,"eor",IZPX,2,emul_eor,false
OP_NOPI_43,"invalid",IMMEDIATE,2,NULL,false
OP_NOPI_44,"invalid",IMPLIED,1,NULL,false
OP_NOPI_45,"invalid",ZP,2,NULL,false
OP_NOPI_43,"invalid",IMMEDIATE,2,emul_invalid,false
OP_NOPI_44,"invalid",IMPLIED,1,emul_invalid,false
OP_NOPI_45,"invalid",ZP,2,emul_invalid,false
OP_EOR_ZP,"eor",ZP,2,emul_eor,false
OP_LSR_ZP,"lsr",ZP,2,emul_lsr,false
OP_RMB4_ZP,"rmb4",ZP,2,emul_rmb4,false
OP_PHA,"pha",IMPLIED,1,emul_pha,false
OP_EOR_IMM,"eor",IMMEDIATE,2,emul_eor,false
OP_LSR,"lsr",ACCUMULATOR,1,emul_lsr,false
OP_NOPI_4C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_4C,"invalid",IMPLIED,1,emul_invalid,false
OP_JMP_ABS,"jmp",ABSOLUTE,3,emul_jmp,true
OP_EOR_ABS,"eor",ABSOLUTE,3,emul_eor,false
OP_LSR_ABS,"lsr",ABSOLUTE,3,emul_lsr,false
@ -82,23 +82,23 @@ OP_BBR4_REL,"bbr4",ZPR,2,emul_bbr4,true
OP_BVC_REL,"bvc",RELATIVE,2,emul_bvc,true
OP_EOR_IZPY,"eor",IZPY,2,emul_eor,false
OP_EOR_IZP,"eor",IZP,2,emul_eor,false
OP_NOPI_54,"invalid",IMPLIED,1,NULL,false
OP_NOPI_55,"invalid",ZPX,2,NULL,false
OP_NOPI_54,"invalid",IMPLIED,1,emul_invalid,false
OP_NOPI_55,"invalid",ZPX,2,emul_invalid,false
OP_EOR_ZPX,"eor",ZPX,2,emul_eor,false
OP_LSR_ZPX,"lsr",ZPX,2,emul_lsr,false
OP_RMB5_ZP,"rmb5",ZP,2,emul_rmb5,false
OP_CLI,"cli",IMPLIED,1,emul_cli,false
OP_EOR_ABSY,"eor",ABSOLUTEY,3,emul_eor,false
OP_PHY,"phy",IMPLIED,1,emul_phy,false
OP_NOPI_5C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_5D,"invalid",ABSOLUTE,3,NULL,false
OP_NOPI_5C,"invalid",IMPLIED,1,emul_invalid,false
OP_NOPI_5D,"invalid",ABSOLUTE,3,emul_invalid,false
OP_EOR_ABSX,"eor",ABSOLUTEX,3,emul_eor,false
OP_LSR_ABSX,"lsr",ABSOLUTEX,3,emul_lsr,false
OP_BBR5_REL,"bbr5",ZPR,2,emul_bbr5,true
OP_RTS,"rts",IMPLIED,1,emul_rts,false
OP_ADC_IZPX,"adc",IZPX,2,emul_adc,false
OP_NOPI_63,"invalid",IMMEDIATE,2,NULL,false
OP_NOPI_64,"invalid",IMPLIED,1,NULL,false
OP_NOPI_63,"invalid",IMMEDIATE,2,emul_invalid,false
OP_NOPI_64,"invalid",IMPLIED,1,emul_invalid,false
OP_STZ_ZP,"stz",ZP,2,emul_stz,false
OP_ADC_ZP,"adc",ZP,2,emul_adc,false
OP_ROR_ZP,"ror",ZP,2,emul_ror,false
@ -106,7 +106,7 @@ OP_RMB6_ZP,"rmb6",ZP,2,emul_rmb6,false
OP_PLA,"pla",IMPLIED,1,emul_pla,false
OP_ADC_IMM,"adc",IMMEDIATE,2,emul_adc,false
OP_ROR,"ror",ACCUMULATOR,1,emul_ror,false
OP_NOPI_6C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_6C,"invalid",IMPLIED,1,emul_invalid,false
OP_JMP_IABS,"jmp",IABSOLUTE,3,emul_jmp,true
OP_ADC_ABS,"adc",ABSOLUTE,3,emul_adc,false
OP_ROR_ABS,"ror",ABSOLUTE,3,emul_ror,false
@ -114,7 +114,7 @@ OP_BBR6_REL,"bbr6",ZPR,2,emul_bbr6,true
OP_BVS_REL,"bvs",RELATIVE,2,emul_bvs,true
OP_ADC_IZPY,"adc",IZPY,2,emul_adc,false
OP_ADC_IZP,"adc",IZP,2,emul_adc,false
OP_NOPI_74,"invalid",IMPLIED,1,NULL,false
OP_NOPI_74,"invalid",IMPLIED,1,emul_invalid,false
OP_STZ_ZPX,"stz",ZPX,2,emul_stz,false
OP_ADC_ZPX,"adc",ZPX,2,emul_adc,false
OP_ROR_ZPX,"ror",ZPX,2,emul_ror,false
@ -122,15 +122,15 @@ OP_RMB7_ZP,"rmb7",ZP,2,emul_rmb7,false
OP_SEI,"sei",IMPLIED,1,emul_sei,false
OP_ADC_ABSY,"adc",ABSOLUTEY,3,emul_adc,false
OP_PLY,"ply",IMPLIED,1,emul_ply,false
OP_NOPI_7C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_7C,"invalid",IMPLIED,1,emul_invalid,false
OP_JMP_IABSX,"jmp",IABSOLUTEX,3,emul_jmp,true
OP_ADC_ABSX,"adc",ABSOLUTEX,3,emul_adc,false
OP_ROR_ABSX,"ror",ABSOLUTEX,3,emul_ror,false
OP_BBR7_REL,"bbr7",ZPR,2,emul_bbr7,true
OP_BRA_REL,"bra",RELATIVE,2,emul_bra,true
OP_STA_IZPX,"sta",IZPX,2,emul_sta,false
OP_NOPI_83,"invalid",IMMEDIATE,2,NULL,false
OP_NOPI_84,"invalid",IMPLIED,1,NULL,false
OP_NOPI_83,"invalid",IMMEDIATE,2,emul_invalid,false
OP_NOPI_84,"invalid",IMPLIED,1,emul_invalid,false
OP_STY_ZP,"sty",ZP,2,emul_sty,false
OP_STA_ZP,"sta",ZP,2,emul_sta,false
OP_STX_ZP,"stx",ZP,2,emul_stx,false
@ -138,7 +138,7 @@ OP_SMB0_ZP,"smb0",ZP,2,emul_smb0,false
OP_DEY,"dey",IMPLIED,1,emul_dey,false
OP_BIT_IMM,"bit",IMMEDIATE,2,emul_bit,false
OP_TXA,"txa",IMPLIED,1,emul_txa,false
OP_NOPI_8C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_8C,"invalid",IMPLIED,1,emul_invalid,false
OP_STY_ABS,"sty",ABSOLUTE,3,emul_sty,false
OP_STA_ABS,"sta",ABSOLUTE,3,emul_sta,false
OP_STX_ABS,"stx",ABSOLUTE,3,emul_stx,false
@ -146,7 +146,7 @@ OP_BBS0_REL,"bbs0",ZPR,2,emul_bbs0,true
OP_BCC_REL,"bcc",RELATIVE,2,emul_bcc,true
OP_STA_IZPY,"sta",IZPY,2,emul_sta,false
OP_STA_IZP,"sta",IZP,2,emul_sta,false
OP_NOPI_94,"invalid",IMPLIED,1,NULL,false
OP_NOPI_94,"invalid",IMPLIED,1,emul_invalid,false
OP_STY_ZPX,"sty",ZPX,2,emul_sty,false
OP_STA_ZPX,"sta",ZPX,2,emul_sta,false
OP_STX_ZPY,"stx",ZPY,2,emul_stx,false
@ -154,7 +154,7 @@ OP_SMB1_ZP,"smb1",ZP,2,emul_smb1,false
OP_TYA,"tya",IMPLIED,1,emul_tya,false
OP_STA_ABSY,"sta",ABSOLUTEY,3,emul_sta,false
OP_TXS,"txs",IMPLIED,1,emul_txs,false
OP_NOPI_9C,"invalid",IMPLIED,1,NULL,false
OP_NOPI_9C,"invalid",IMPLIED,1,emul_invalid,false
OP_STZ_ABS,"stz",ABSOLUTE,3,emul_stz,false
OP_STA_ABSX,"sta",ABSOLUTEX,3,emul_sta,false
OP_STZ_ABSX,"stz",ABSOLUTEX,3,emul_stz,false
@ -162,7 +162,7 @@ OP_BBS1_REL,"bbs1",ZPR,2,emul_bbs1,true
OP_LDY_IMM,"ldy",IMMEDIATE,2,emul_ldy,false
OP_LDA_IZPX,"lda",IZPX,2,emul_lda,false
OP_LDX_IMM,"ldx",IMMEDIATE,2,emul_ldx,false
OP_NOPI_A4,"invalid",IMPLIED,1,NULL,false
OP_NOPI_A4,"invalid",IMPLIED,1,emul_invalid,false
OP_LDY_ZP,"ldy",ZP,2,emul_ldy,false
OP_LDA_ZP,"lda",ZP,2,emul_lda,false
OP_LDX_ZP,"ldx",ZP,2,emul_ldx,false
@ -170,7 +170,7 @@ OP_SMB2_ZP,"smb2",ZP,2,emul_smb2,false
OP_TAY,"tay",IMPLIED,1,emul_tay,false
OP_LDA_IMM,"lda",IMMEDIATE,2,emul_lda,false
OP_TAX,"tax",IMPLIED,1,emul_tax,false
OP_NOPI_AC,"invalid",IMPLIED,1,NULL,false
OP_NOPI_AC,"invalid",IMPLIED,1,emul_invalid,false
OP_LDY_ABS,"ldy",ABSOLUTE,3,emul_ldy,false
OP_LDA_ABS,"lda",ABSOLUTE,3,emul_lda,false
OP_LDX_ABS,"ldx",ABSOLUTE,3,emul_ldx,false
@ -178,7 +178,7 @@ OP_BBS2_REL,"bbs2",ZPR,2,emul_bbs2,true
OP_BCS_REL,"bcs",RELATIVE,2,emul_bcs,true
OP_LDA_IZPY,"lda",IZPY,2,emul_lda,false
OP_LDA_IZP,"lda",IZP,2,emul_lda,false
OP_NOPI_B4,"invalid",IMPLIED,1,NULL,false
OP_NOPI_B4,"invalid",IMPLIED,1,emul_invalid,false
OP_LDY_ZPX,"ldy",ZPX,2,emul_ldy,false
OP_LDA_ZPX,"lda",ZPX,2,emul_lda,false
OP_LDX_ZPY,"ldx",ZPY,1,emul_ldx,false
@ -186,15 +186,15 @@ OP_SMB3_ZP,"smb3",ZP,2,emul_smb3,false
OP_CLV,"clv",IMPLIED,1,emul_clv,false
OP_LDA_ABSY,"lda",ABSOLUTEY,3,emul_lda,false
OP_TSX,"tsx",IMPLIED,1,emul_tsx,false
OP_NOPI_BC,"invalid",IMPLIED,1,NULL,false
OP_NOPI_BC,"invalid",IMPLIED,1,emul_invalid,false
OP_LDY_ABSX,"ldy",ABSOLUTEX,3,emul_ldy,false
OP_LDA_ABSX,"lda",ABSOLUTEX,3,emul_lda,false
OP_LDX_ABSY,"ldx",ABSOLUTEY,3,emul_ldx,false
OP_BBS3_REL,"bbs3",ZPR,2,emul_bbs3,true
OP_CPY_IMM,"cpy",IMMEDIATE,2,emul_cpy,false
OP_CMP_IZPX,"cmp",IZPX,2,emul_cmp,false
OP_NOPI_C3,"invalid",IMMEDIATE,2,NULL,false
OP_NOPI_C4,"invalid",IMPLIED,1,NULL,false
OP_NOPI_C3,"invalid",IMMEDIATE,2,emul_invalid,false
OP_NOPI_C4,"invalid",IMPLIED,1,emul_invalid,false
OP_CPY_ZP,"cpy",ZP,2,emul_cpy,false
OP_CMP_ZP,"cmp",ZP,2,emul_cmp,false
OP_DEC_ZP,"dec",ZP,2,emul_dec,false
@ -210,8 +210,8 @@ OP_BBS4_REL,"bbs4",ZPR,2,emul_bbs4,true
OP_BNE_REL,"bne",RELATIVE,2,emul_bne,true
OP_CMP_IZPY,"cmp",IZPY,2,emul_cmp,false
OP_CMP_IZP,"cmp",IZP,2,emul_cmp,false
OP_NOPI_D4,"invalid",IMPLIED,1,NULL,false
OP_NOPI_D5,"invalid",ZPX,2,NULL,false
OP_NOPI_D4,"invalid",IMPLIED,1,emul_invalid,false
OP_NOPI_D5,"invalid",ZPX,2,emul_invalid,false
OP_CMP_ZPX,"cmp",ZPX,2,emul_cmp,false
OP_DEC_ZPX,"dec",ZPX,2,emul_dec,false
OP_SMB5_ZP,"smb5",ZP,2,emul_smb5,false
@ -219,14 +219,14 @@ OP_CLD,"cld",IMPLIED,1,emul_cld,false
OP_CMP_ABSY,"cmp",ABSOLUTEY,3,emul_cmp,false
OP_PHX,"phx",IMPLIED,1,emul_phx,false
OP_STP,"stp",IMPLIED,1,emul_stp,false
OP_NOPI_DD,"invalid",ABSOLUTE,3,NULL,false
OP_NOPI_DD,"invalid",ABSOLUTE,3,emul_invalid,false
OP_CMP_ABSX,"cmp",ABSOLUTEX,3,emul_cmp,false
OP_DEC_ABSX,"dec",ABSOLUTEX,3,emul_dec,false
OP_BBS5_REL,"bbs5",ZPR,2,emul_bbs5,true
OP_CPX_IMM,"cpx",IMMEDIATE,2,emul_cpx,false
OP_SBC_IZPX,"sbc",IZPX,2,emul_sbc,false
OP_NOPI_E3,"invalid",IMMEDIATE,2,NULL,false
OP_NOPI_E4,"invalid",IMPLIED,1,NULL,false
OP_NOPI_E3,"invalid",IMMEDIATE,2,emul_invalid,false
OP_NOPI_E4,"invalid",IMPLIED,1,emul_invalid,false
OP_CPX_ZP,"cpx",ZP,2,emul_cpx,false
OP_SBC_ZP,"sbc",ZP,2,emul_sbc,false
OP_INC_ZP,"inc",ZP,2,emul_inc,false
@ -234,7 +234,7 @@ OP_SMB6_ZP,"smb6",ZP,2,emul_smb6,false
OP_INX,"inx",IMPLIED,1,emul_inx,false
OP_SBC_IMM,"sbc",IMMEDIATE,2,emul_sbc,false
OP_NOP,"nop",IMPLIED,1,emul_nop,false
OP_NOPI_EC,"invalid",IMPLIED,1,NULL,false
OP_NOPI_EC,"invalid",IMPLIED,1,emul_invalid,false
OP_CPX_ABS,"cpx",ABSOLUTE,3,emul_cpx,false
OP_SBC_ABS,"sbc",ABSOLUTE,3,emul_sbc,false
OP_INC_ABS,"inc",ABSOLUTE,3,emul_inc,false
@ -242,16 +242,16 @@ OP_BBS6_REL,"bbs6",ZPR,2,emul_bbs6,true
OP_BEQ_REL,"beq",RELATIVE,2,emul_beq,true
OP_SBC_IZPY,"sbc",IZPY,2,emul_sbc,false
OP_SBC_IZP,"sbc",IZP,2,emul_sbc,false
OP_NOPI_F4,"invalid",IMPLIED,1,NULL,false
OP_NOPI_F5,"invalid",ZPX,2,NULL,false
OP_NOPI_F4,"invalid",IMPLIED,1,emul_invalid,false
OP_NOPI_F5,"invalid",ZPX,2,emul_invalid,false
OP_SBC_ZPX,"sbc",ZPX,2,emul_sbc,false
OP_INC_ZPX,"inc",ZPX,2,emul_inc,false
OP_SMB7_ZP,"smb7",ZP,2,emul_smb7,false
OP_SED,"sed",IMPLIED,1,emul_sed,false
OP_SBC_ABSY,"sbc",ABSOLUTEY,3,emul_sbc,false
OP_PLX,"plx",IMPLIED,1,emul_plx,false
OP_NOPI_FC,"invalid",IMPLIED,1,NULL,false
OP_NOPI_FD,"invalid",ABSOLUTE,3,NULL,false
OP_NOPI_FC,"invalid",IMPLIED,1,emul_invalid,false
OP_NOPI_FD,"invalid",ABSOLUTE,3,emul_invalid,false
OP_SBC_ABSX,"sbc",ABSOLUTEX,3,emul_sbc,false
OP_INC_ABSX,"inc",ABSOLUTEX,3,emul_inc,false
OP_BBS7_REL,"bbs7",ZPR,2,emul_bbs7,true

1 opcode_id mnemonic addressing size emulation modify_pc
2 OP_BRK brk IMPLIED 2 emul_brk true
3 OP_ORA_IZPX ora IZPX 2 emul_ora false
4 OP_NOPI_3 invalid IMMEDIATE 2 NULL emul_invalid false
5 OP_NOPI_4 invalid IMPLIED 1 NULL emul_invalid false
6 OP_TSB_ZP tsb ZP 2 emul_tsb false
7 OP_ORA_ZP ora ZP 2 emul_ora false
8 OP_ASL_ZP asl ZP 2 emul_asl false
10 OP_PHP php IMPLIED 1 emul_php false
11 OP_ORA_IMM ora IMMEDIATE 2 emul_ora false
12 OP_ASL asl ACCUMULATOR 1 emul_asl false
13 OP_NOPI_C invalid IMPLIED 1 NULL emul_invalid false
14 OP_TSB_ABS tsb ABSOLUTE 3 emul_tsb false
15 OP_ORA_ABS ora ABSOLUTE 3 emul_ora false
16 OP_ASL_ABS asl ABSOLUTE 3 emul_asl false
18 OP_BPL_REL bpl RELATIVE 2 emul_bpl true
19 OP_ORA_IZPY ora IZPY 2 emul_ora false
20 OP_ORA_IZP ora IZP 2 emul_ora false
21 OP_NOPI_14 invalid IMPLIED 1 NULL emul_invalid false
22 OP_TRB_ZP trb ZP 2 emul_trb false
23 OP_ORA_ZPX ora ZPX 2 emul_ora false
24 OP_ASL_ZPX asl ZPX 2 emul_asl false
26 OP_CLC clc IMPLIED 1 emul_clc false
27 OP_ORA_ABSY ora ABSOLUTEY 3 emul_ora false
28 OP_INC inc ACCUMULATOR 1 emul_inc false
29 OP_NOPI_1C invalid IMPLIED 1 NULL emul_invalid false
30 OP_TRB_ABS trb ABSOLUTE 3 emul_trb false
31 OP_ORA_ABSX ora ABSOLUTEX 3 emul_ora false
32 OP_ASL_ABSX asl ABSOLUTEX 3 emul_asl false
33 OP_BBR1_REL bbr1 ZPR 2 emul_bbr1 true
34 OP_JSR jsr ABSOLUTE 3 emul_jsr true
35 OP_AND_IZPX and IZPX 2 emul_and false
36 OP_NOPI_23 invalid IMMEDIATE 2 NULL emul_invalid false
37 OP_NOPI_24 invalid IMPLIED 1 NULL emul_invalid false
38 OP_BIT_ZP bit ZP 2 emul_bit false
39 OP_AND_ZP and ZP 2 emul_and false
40 OP_ROL_ZP rol ZP 2 emul_rol false
42 OP_PLP plp IMPLIED 1 emul_plp false
43 OP_AND_IMM and IMMEDIATE 2 emul_and false
44 OP_ROL rol ACCUMULATOR 1 emul_rol false
45 OP_NOPI_2C invalid IMPLIED 1 NULL emul_invalid false
46 OP_BIT_ABS bit ABSOLUTE 3 emul_bit false
47 OP_AND_ABS and ABSOLUTE 3 emul_and false
48 OP_ROL_ABS rol ABSOLUTE 3 emul_rol false
50 OP_BMI_REL bmi RELATIVE 2 emul_bmi true
51 OP_AND_IZPY and IZPY 2 emul_and false
52 OP_AND_IZP and IZP 2 emul_and false
53 OP_NOPI_34 invalid IMPLIED 1 NULL emul_invalid false
54 OP_BIT_ZPX bit ZPX 2 emul_bit false
55 OP_AND_ZPX and ZPX 2 emul_and false
56 OP_ROL_ZPX rol ZPX 2 emul_rol false
58 OP_SEC sec IMPLIED 1 emul_sec false
59 OP_AND_ABSY and ABSOLUTEY 3 emul_and false
60 OP_DEC dec ACCUMULATOR 1 emul_dec false
61 OP_NOPI_3C invalid IMPLIED 1 NULL emul_invalid false
62 OP_BIT_ABSX bit ABSOLUTEX 3 emul_bit false
63 OP_AND_ABSX and ABSOLUTEX 3 emul_and false
64 OP_ROL_ABSX rol ABSOLUTEX 3 emul_rol false
65 OP_BBR3_REL bbr3 ZPR 2 emul_bbr3 true
66 OP_RTI rti IMPLIED 1 emul_rti true
67 OP_EOR_IZPX eor IZPX 2 emul_eor false
68 OP_NOPI_43 invalid IMMEDIATE 2 NULL emul_invalid false
69 OP_NOPI_44 invalid IMPLIED 1 NULL emul_invalid false
70 OP_NOPI_45 invalid ZP 2 NULL emul_invalid false
71 OP_EOR_ZP eor ZP 2 emul_eor false
72 OP_LSR_ZP lsr ZP 2 emul_lsr false
73 OP_RMB4_ZP rmb4 ZP 2 emul_rmb4 false
74 OP_PHA pha IMPLIED 1 emul_pha false
75 OP_EOR_IMM eor IMMEDIATE 2 emul_eor false
76 OP_LSR lsr ACCUMULATOR 1 emul_lsr false
77 OP_NOPI_4C invalid IMPLIED 1 NULL emul_invalid false
78 OP_JMP_ABS jmp ABSOLUTE 3 emul_jmp true
79 OP_EOR_ABS eor ABSOLUTE 3 emul_eor false
80 OP_LSR_ABS lsr ABSOLUTE 3 emul_lsr false
82 OP_BVC_REL bvc RELATIVE 2 emul_bvc true
83 OP_EOR_IZPY eor IZPY 2 emul_eor false
84 OP_EOR_IZP eor IZP 2 emul_eor false
85 OP_NOPI_54 invalid IMPLIED 1 NULL emul_invalid false
86 OP_NOPI_55 invalid ZPX 2 NULL emul_invalid false
87 OP_EOR_ZPX eor ZPX 2 emul_eor false
88 OP_LSR_ZPX lsr ZPX 2 emul_lsr false
89 OP_RMB5_ZP rmb5 ZP 2 emul_rmb5 false
90 OP_CLI cli IMPLIED 1 emul_cli false
91 OP_EOR_ABSY eor ABSOLUTEY 3 emul_eor false
92 OP_PHY phy IMPLIED 1 emul_phy false
93 OP_NOPI_5C invalid IMPLIED 1 NULL emul_invalid false
94 OP_NOPI_5D invalid ABSOLUTE 3 NULL emul_invalid false
95 OP_EOR_ABSX eor ABSOLUTEX 3 emul_eor false
96 OP_LSR_ABSX lsr ABSOLUTEX 3 emul_lsr false
97 OP_BBR5_REL bbr5 ZPR 2 emul_bbr5 true
98 OP_RTS rts IMPLIED 1 emul_rts false
99 OP_ADC_IZPX adc IZPX 2 emul_adc false
100 OP_NOPI_63 invalid IMMEDIATE 2 NULL emul_invalid false
101 OP_NOPI_64 invalid IMPLIED 1 NULL emul_invalid false
102 OP_STZ_ZP stz ZP 2 emul_stz false
103 OP_ADC_ZP adc ZP 2 emul_adc false
104 OP_ROR_ZP ror ZP 2 emul_ror false
106 OP_PLA pla IMPLIED 1 emul_pla false
107 OP_ADC_IMM adc IMMEDIATE 2 emul_adc false
108 OP_ROR ror ACCUMULATOR 1 emul_ror false
109 OP_NOPI_6C invalid IMPLIED 1 NULL emul_invalid false
110 OP_JMP_IABS jmp IABSOLUTE 3 emul_jmp true
111 OP_ADC_ABS adc ABSOLUTE 3 emul_adc false
112 OP_ROR_ABS ror ABSOLUTE 3 emul_ror false
114 OP_BVS_REL bvs RELATIVE 2 emul_bvs true
115 OP_ADC_IZPY adc IZPY 2 emul_adc false
116 OP_ADC_IZP adc IZP 2 emul_adc false
117 OP_NOPI_74 invalid IMPLIED 1 NULL emul_invalid false
118 OP_STZ_ZPX stz ZPX 2 emul_stz false
119 OP_ADC_ZPX adc ZPX 2 emul_adc false
120 OP_ROR_ZPX ror ZPX 2 emul_ror false
122 OP_SEI sei IMPLIED 1 emul_sei false
123 OP_ADC_ABSY adc ABSOLUTEY 3 emul_adc false
124 OP_PLY ply IMPLIED 1 emul_ply false
125 OP_NOPI_7C invalid IMPLIED 1 NULL emul_invalid false
126 OP_JMP_IABSX jmp IABSOLUTEX 3 emul_jmp true
127 OP_ADC_ABSX adc ABSOLUTEX 3 emul_adc false
128 OP_ROR_ABSX ror ABSOLUTEX 3 emul_ror false
129 OP_BBR7_REL bbr7 ZPR 2 emul_bbr7 true
130 OP_BRA_REL bra RELATIVE 2 emul_bra true
131 OP_STA_IZPX sta IZPX 2 emul_sta false
132 OP_NOPI_83 invalid IMMEDIATE 2 NULL emul_invalid false
133 OP_NOPI_84 invalid IMPLIED 1 NULL emul_invalid false
134 OP_STY_ZP sty ZP 2 emul_sty false
135 OP_STA_ZP sta ZP 2 emul_sta false
136 OP_STX_ZP stx ZP 2 emul_stx false
138 OP_DEY dey IMPLIED 1 emul_dey false
139 OP_BIT_IMM bit IMMEDIATE 2 emul_bit false
140 OP_TXA txa IMPLIED 1 emul_txa false
141 OP_NOPI_8C invalid IMPLIED 1 NULL emul_invalid false
142 OP_STY_ABS sty ABSOLUTE 3 emul_sty false
143 OP_STA_ABS sta ABSOLUTE 3 emul_sta false
144 OP_STX_ABS stx ABSOLUTE 3 emul_stx false
146 OP_BCC_REL bcc RELATIVE 2 emul_bcc true
147 OP_STA_IZPY sta IZPY 2 emul_sta false
148 OP_STA_IZP sta IZP 2 emul_sta false
149 OP_NOPI_94 invalid IMPLIED 1 NULL emul_invalid false
150 OP_STY_ZPX sty ZPX 2 emul_sty false
151 OP_STA_ZPX sta ZPX 2 emul_sta false
152 OP_STX_ZPY stx ZPY 2 emul_stx false
154 OP_TYA tya IMPLIED 1 emul_tya false
155 OP_STA_ABSY sta ABSOLUTEY 3 emul_sta false
156 OP_TXS txs IMPLIED 1 emul_txs false
157 OP_NOPI_9C invalid IMPLIED 1 NULL emul_invalid false
158 OP_STZ_ABS stz ABSOLUTE 3 emul_stz false
159 OP_STA_ABSX sta ABSOLUTEX 3 emul_sta false
160 OP_STZ_ABSX stz ABSOLUTEX 3 emul_stz false
162 OP_LDY_IMM ldy IMMEDIATE 2 emul_ldy false
163 OP_LDA_IZPX lda IZPX 2 emul_lda false
164 OP_LDX_IMM ldx IMMEDIATE 2 emul_ldx false
165 OP_NOPI_A4 invalid IMPLIED 1 NULL emul_invalid false
166 OP_LDY_ZP ldy ZP 2 emul_ldy false
167 OP_LDA_ZP lda ZP 2 emul_lda false
168 OP_LDX_ZP ldx ZP 2 emul_ldx false
170 OP_TAY tay IMPLIED 1 emul_tay false
171 OP_LDA_IMM lda IMMEDIATE 2 emul_lda false
172 OP_TAX tax IMPLIED 1 emul_tax false
173 OP_NOPI_AC invalid IMPLIED 1 NULL emul_invalid false
174 OP_LDY_ABS ldy ABSOLUTE 3 emul_ldy false
175 OP_LDA_ABS lda ABSOLUTE 3 emul_lda false
176 OP_LDX_ABS ldx ABSOLUTE 3 emul_ldx false
178 OP_BCS_REL bcs RELATIVE 2 emul_bcs true
179 OP_LDA_IZPY lda IZPY 2 emul_lda false
180 OP_LDA_IZP lda IZP 2 emul_lda false
181 OP_NOPI_B4 invalid IMPLIED 1 NULL emul_invalid false
182 OP_LDY_ZPX ldy ZPX 2 emul_ldy false
183 OP_LDA_ZPX lda ZPX 2 emul_lda false
184 OP_LDX_ZPY ldx ZPY 1 emul_ldx false
186 OP_CLV clv IMPLIED 1 emul_clv false
187 OP_LDA_ABSY lda ABSOLUTEY 3 emul_lda false
188 OP_TSX tsx IMPLIED 1 emul_tsx false
189 OP_NOPI_BC invalid IMPLIED 1 NULL emul_invalid false
190 OP_LDY_ABSX ldy ABSOLUTEX 3 emul_ldy false
191 OP_LDA_ABSX lda ABSOLUTEX 3 emul_lda false
192 OP_LDX_ABSY ldx ABSOLUTEY 3 emul_ldx false
193 OP_BBS3_REL bbs3 ZPR 2 emul_bbs3 true
194 OP_CPY_IMM cpy IMMEDIATE 2 emul_cpy false
195 OP_CMP_IZPX cmp IZPX 2 emul_cmp false
196 OP_NOPI_C3 invalid IMMEDIATE 2 NULL emul_invalid false
197 OP_NOPI_C4 invalid IMPLIED 1 NULL emul_invalid false
198 OP_CPY_ZP cpy ZP 2 emul_cpy false
199 OP_CMP_ZP cmp ZP 2 emul_cmp false
200 OP_DEC_ZP dec ZP 2 emul_dec false
210 OP_BNE_REL bne RELATIVE 2 emul_bne true
211 OP_CMP_IZPY cmp IZPY 2 emul_cmp false
212 OP_CMP_IZP cmp IZP 2 emul_cmp false
213 OP_NOPI_D4 invalid IMPLIED 1 NULL emul_invalid false
214 OP_NOPI_D5 invalid ZPX 2 NULL emul_invalid false
215 OP_CMP_ZPX cmp ZPX 2 emul_cmp false
216 OP_DEC_ZPX dec ZPX 2 emul_dec false
217 OP_SMB5_ZP smb5 ZP 2 emul_smb5 false
219 OP_CMP_ABSY cmp ABSOLUTEY 3 emul_cmp false
220 OP_PHX phx IMPLIED 1 emul_phx false
221 OP_STP stp IMPLIED 1 emul_stp false
222 OP_NOPI_DD invalid ABSOLUTE 3 NULL emul_invalid false
223 OP_CMP_ABSX cmp ABSOLUTEX 3 emul_cmp false
224 OP_DEC_ABSX dec ABSOLUTEX 3 emul_dec false
225 OP_BBS5_REL bbs5 ZPR 2 emul_bbs5 true
226 OP_CPX_IMM cpx IMMEDIATE 2 emul_cpx false
227 OP_SBC_IZPX sbc IZPX 2 emul_sbc false
228 OP_NOPI_E3 invalid IMMEDIATE 2 NULL emul_invalid false
229 OP_NOPI_E4 invalid IMPLIED 1 NULL emul_invalid false
230 OP_CPX_ZP cpx ZP 2 emul_cpx false
231 OP_SBC_ZP sbc ZP 2 emul_sbc false
232 OP_INC_ZP inc ZP 2 emul_inc false
234 OP_INX inx IMPLIED 1 emul_inx false
235 OP_SBC_IMM sbc IMMEDIATE 2 emul_sbc false
236 OP_NOP nop IMPLIED 1 emul_nop false
237 OP_NOPI_EC invalid IMPLIED 1 NULL emul_invalid false
238 OP_CPX_ABS cpx ABSOLUTE 3 emul_cpx false
239 OP_SBC_ABS sbc ABSOLUTE 3 emul_sbc false
240 OP_INC_ABS inc ABSOLUTE 3 emul_inc false
242 OP_BEQ_REL beq RELATIVE 2 emul_beq true
243 OP_SBC_IZPY sbc IZPY 2 emul_sbc false
244 OP_SBC_IZP sbc IZP 2 emul_sbc false
245 OP_NOPI_F4 invalid IMPLIED 1 NULL emul_invalid false
246 OP_NOPI_F5 invalid ZPX 2 NULL emul_invalid false
247 OP_SBC_ZPX sbc ZPX 2 emul_sbc false
248 OP_INC_ZPX inc ZPX 2 emul_inc false
249 OP_SMB7_ZP smb7 ZP 2 emul_smb7 false
250 OP_SED sed IMPLIED 1 emul_sed false
251 OP_SBC_ABSY sbc ABSOLUTEY 3 emul_sbc false
252 OP_PLX plx IMPLIED 1 emul_plx false
253 OP_NOPI_FC invalid IMPLIED 1 NULL emul_invalid false
254 OP_NOPI_FD invalid ABSOLUTE 3 NULL emul_invalid false
255 OP_SBC_ABSX sbc ABSOLUTEX 3 emul_sbc false
256 OP_INC_ABSX inc ABSOLUTEX 3 emul_inc false
257 OP_BBS7_REL bbs7 ZPR 2 emul_bbs7 true

12
src/emulation.c
View File

@ -1,6 +1,8 @@
#include <stdio.h>
#include <assert.h>
#include "log.h"
#include "emulation.h"
/* RMB, SMB, BBR, BBS are handled by these */
@ -1096,3 +1098,13 @@ emul_wai(rk65c02emu_t *e, void *id, instruction_t *i)
e->stopreason = WAI;
}
/* emulate invalid opcode (variable-lenght NOP) */
void
emul_invalid(rk65c02emu_t *e, void *id, instruction_t *i)
{
/* Essentially do nothing, but log this. */
rk65c02_log(LOG_WARN, "Invalid opcode %x at %x", i->opcode,
e->regs.PC);
}

19
src/rk65c02.c
View File

@ -127,21 +127,12 @@ rk65c02_exec(rk65c02emu_t *e)
i = instruction_fetch(e->bus, e->regs.PC);
id = instruction_decode(i.opcode);
if (id.emul != NULL) {
id.emul(e, &id, &i);
assert(id.emul);
if (!instruction_modify_pc(&id))
program_counter_increment(e, &id);
} else {
/*
* Technically, on a real 65C02, all invalid opcodes
* are NOPs, but until rk65c02 reaches some level of
* maturity, let's catch them here to help iron out the
* bugs.
*/
rk65c02_panic(e, "invalid opcode %X @ %X\n",
i.opcode, e->regs.PC);
}
id.emul(e, &id, &i);
if (!instruction_modify_pc(&id))
program_counter_increment(e, &id);
if (e->trace)
debug_trace_savestate(e, tpc, &id, &i);