Radosław Kujawa
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0c63342ad7
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Add comments explaing what these functions do.
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2017-01-27 10:13:32 +01:00 |
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Radosław Kujawa
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b7f1b8095b
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Add emulation of INC and DEC.
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2017-01-27 00:04:47 +01:00 |
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Radosław Kujawa
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1da576c821
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Merge branch 'master' of github.com:rkujawa/rk65c02
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2017-01-26 17:27:22 +01:00 |
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Radosław Kujawa
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80b6848108
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Preliminary support for stepping.
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2017-01-26 13:11:00 +01:00 |
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Radosław Kujawa
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941e89173a
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Add struct with info about reason for stopping emulation.
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2017-01-26 12:52:40 +01:00 |
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Radosław Kujawa
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285d2ee828
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Initial state of the CPU has IRQ disable bit set.
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2017-01-25 21:17:18 +01:00 |
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Radosław Kujawa
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13ef3e2d08
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Add PHX, PLX, PHY, PLY emulation and test cases.
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2017-01-25 13:14:00 +01:00 |
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Radosław Kujawa
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acc0fad32e
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Add emulation of BIT instruction and test cases for it.
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2017-01-25 10:10:00 +01:00 |
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Radosław Kujawa
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7915657355
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Add bit testing macro.
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2017-01-25 10:09:50 +01:00 |
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Radosław Kujawa
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95db0b7dd2
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Add commented out debug message.
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2017-01-25 10:09:38 +01:00 |
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Radosław Kujawa
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47028b0e26
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Add commented out debug message.
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2017-01-24 22:18:21 +01:00 |
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Radosław Kujawa
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90b6c06e32
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Fix missing breaks in indirect zero page handling switch.
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2017-01-24 22:18:02 +01:00 |
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Radosław Kujawa
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39aaca5034
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Correct indirect zero page Y behaviour.
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2017-01-24 16:37:10 +01:00 |
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Radosław Kujawa
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20a39a8d6c
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Correct wrong ORA indirect zero page X size.
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2017-01-24 16:36:39 +01:00 |
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Radosław Kujawa
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342a188314
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Fix wrong mnemonic for absolute ORA.
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2017-01-23 15:39:10 +01:00 |
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Radosław Kujawa
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6c3a203cdc
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Support all AND addressing modes.
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2017-01-23 15:28:14 +01:00 |
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Radosław Kujawa
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0dd63f2bf0
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Add ROL and ROR emulation. Too old to ror and to rol!
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2017-01-23 15:25:32 +01:00 |
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Radosław Kujawa
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f9708ca049
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Add STA, STY, STX emulation.
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2017-01-23 15:02:21 +01:00 |
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Radosław Kujawa
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ee8a16a5ba
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Add ORA and EOR emulation.
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2017-01-23 14:53:05 +01:00 |
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Radosław Kujawa
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6b7298cf8d
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Avoid intermediate variable in AND emulation.
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2017-01-23 14:45:46 +01:00 |
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Radosław Kujawa
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aee947ad1f
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Don't forget to add LDY to CSV...
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2017-01-23 14:44:55 +01:00 |
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Radosław Kujawa
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552fad8a7e
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LDY emulation.
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2017-01-23 14:43:54 +01:00 |
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Radosław Kujawa
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5c38e5f05a
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Add emulation of LDX, TXA, TYA, TXS, TAX, TAY, TSX.
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2017-01-23 14:38:50 +01:00 |
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Radosław Kujawa
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ce492e6cd3
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Support all addressing variants of STZ.
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2017-01-23 13:46:17 +01:00 |
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Radosław Kujawa
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05f6599681
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BSD/OS X awk does not like hexadecimal constants.
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2017-01-23 13:41:31 +01:00 |
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Radosław Kujawa
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9c88afae2a
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BBRx and BBSx instructions have zero page relative addressing.
Add zero page relative as a separate addressing type and adjust
opcode definitions for these two type of opcodes.
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2017-01-23 12:17:06 +01:00 |
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Radosław Kujawa
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ee16c64310
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Implement absolute X, absolute Y addressing.
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2017-01-23 10:48:37 +01:00 |
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Radosław Kujawa
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452e4b3806
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Implement indirect zero page with X and indirect zero page with Y addressing.
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2017-01-23 10:29:19 +01:00 |
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Radosław Kujawa
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9e32c3e493
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Try to emulate all variants of LDA.
But some addressing modes are still unimplemented...
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2017-01-23 10:27:51 +01:00 |
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Radosław Kujawa
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87c424557e
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Implement aboslute addressing mode.
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2017-01-23 00:00:45 +01:00 |
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Radosław Kujawa
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5eede9333b
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Add emulation of PHP, PLP instructions and test cases for them.
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2017-01-22 23:01:24 +01:00 |
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Radosław Kujawa
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074ecdccc3
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No-operand INC has accumulator addressing mode, not implied.
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2017-01-22 22:44:08 +01:00 |
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Radosław Kujawa
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1460817230
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Correct mnemonic for LDX with Zero Page,Y addressing.
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2017-01-22 22:40:32 +01:00 |
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Radosław Kujawa
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fb7d4b28e7
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Add DEX, DEY emulation and test cases for them.
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2017-01-22 22:35:50 +01:00 |
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Radosław Kujawa
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52247f0ce4
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Implement CLC, SEC and test for them.
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2017-01-22 13:50:04 +01:00 |
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Radosław Kujawa
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473e0e2636
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Add INX, INY emulation and test cases.
Some comments while here.
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2017-01-22 13:07:21 +01:00 |
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Radosław Kujawa
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e763ca0d3a
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Avoid getting instruction definition again when emulating.
While here try to make program counter incrementation more universal
and flexible.
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2017-01-22 11:07:19 +01:00 |
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Radosław Kujawa
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c7633feb87
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Add STZ emulation.
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2017-01-21 21:46:35 +01:00 |
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Radosław Kujawa
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86c9c6414c
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Add function to write data onto bus according to choosen addressing mode.
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2017-01-21 21:43:31 +01:00 |
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Radosław Kujawa
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8abbb88d0d
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Fix dependencies for static lib building.
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2017-01-21 21:41:19 +01:00 |
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Radosław Kujawa
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b6ed8892bb
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Add generation of emulation.h to Makefile.
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2017-01-21 14:58:00 +01:00 |
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Radosław Kujawa
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1802bfbd1d
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Add missing includes, fix typo.
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2017-01-21 14:57:49 +01:00 |
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Radosław Kujawa
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e3abea91ef
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Add awk script to automatically generate emulation.h from CSV.
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2017-01-21 14:52:38 +01:00 |
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Radosław Kujawa
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0d5916eb7d
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Gotta generate header for emulation functions from CSV.
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2017-01-21 12:08:00 +01:00 |
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Radosław Kujawa
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5ca671aecb
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Print value of PC register when unimplemented opcode encountered.
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2017-01-21 09:13:43 +01:00 |
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Radosław Kujawa
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1820418c62
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Adjust C header generation to take CSV header into account.
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2017-01-20 23:23:25 +01:00 |
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Radosław Kujawa
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d2dc51cbd3
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Add a header. Now looks nicer on GitHub!
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2017-01-20 23:23:04 +01:00 |
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Radosław Kujawa
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51de051e19
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Stop on unimplemented instruction.
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2017-01-20 23:18:00 +01:00 |
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Radosław Kujawa
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2adf864f4f
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Debugging symbols by default.
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2017-01-20 23:17:35 +01:00 |
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Radosław Kujawa
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c083114c12
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Increment stack pointer before poping.
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2017-01-20 23:16:02 +01:00 |
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Radosław Kujawa
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86e00e651d
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Make this actually compile.
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2017-01-20 22:38:46 +01:00 |
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Radosław Kujawa
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0dc7dac6a3
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Add PLA, PHA emulation.
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2017-01-20 22:26:13 +01:00 |
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Radosław Kujawa
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7862703c88
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Add functions to pop/push emulated CPU stack.
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2017-01-20 22:03:03 +01:00 |
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Radosław Kujawa
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a50da41388
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Implement AND emulation and test.
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2017-01-20 10:41:56 +01:00 |
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Radosław Kujawa
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3bcc7bb096
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Introduce instruction-independent status adjustment functions.
For now only for negative and zero. Also use them in LDA emulation.
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2017-01-20 10:25:19 +01:00 |
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Radosław Kujawa
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5201cfdc87
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Print operand hex vals during disassembly.
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2017-01-20 09:46:33 +01:00 |
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Radosław Kujawa
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14233cf3ca
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Implement status flags for LDA emulation.
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2017-01-20 09:11:34 +01:00 |
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Radosław Kujawa
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bcedb50e48
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Clean up.
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2017-01-20 09:11:22 +01:00 |
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Radosław Kujawa
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b498da3ac8
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Add CLI skeleton.
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2017-01-19 23:49:27 +01:00 |
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Radosław Kujawa
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f42f88c148
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Add status register bits.
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2017-01-19 14:06:19 +01:00 |
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Radosław Kujawa
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6b7ddbf865
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LDA zero page emulation and test for it.
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2017-01-19 11:49:05 +01:00 |
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Radosław Kujawa
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49b70f0e1f
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Make instruction data read more flexible and split from emulation of particular instruction.
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2017-01-19 10:59:35 +01:00 |
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Radosław Kujawa
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87cafb607f
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Support loading ROMs from files, adjust nop test case.
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2017-01-19 00:57:09 +01:00 |
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Radosław Kujawa
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e7380477a9
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Remove debug printfs.
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2017-01-19 00:20:53 +01:00 |
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Radosław Kujawa
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92914d4aa0
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Experiment with emulating opcode requring operands.
Immediate lda now works.
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2017-01-18 22:37:00 +01:00 |
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Radosław Kujawa
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e7e30292d5
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Fix incorrect instruction sizes.
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2017-01-18 22:11:13 +01:00 |
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Radosław Kujawa
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380b524a51
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Assign a separate identifier for all invalid nops.
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2017-01-18 22:05:50 +01:00 |
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Radosław Kujawa
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52ce9bff8c
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Preliminary support for emulation of instructions.
Some refactoring while here.
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2017-01-18 17:18:19 +01:00 |
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Radosław Kujawa
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f106e227cd
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Prepare structures for adding emulation of instructions.
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2017-01-18 15:45:28 +01:00 |
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Radosław Kujawa
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d6876b38a1
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Write down all 65C02 instructions.
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2017-01-18 14:37:44 +01:00 |
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Radosław Kujawa
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3032baeac4
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Temporarily disable assert checking if instr was implemented.
|
2017-01-18 14:37:24 +01:00 |
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Radosław Kujawa
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bd0eeea144
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Adjust build process and instruction-related funcs.
Due to new dynamically build 65c02isa.h header.
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2017-01-18 12:09:14 +01:00 |
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Radosław Kujawa
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611f51201f
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Generate instruction set from CSV file and awk script.
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2017-01-18 12:08:55 +01:00 |
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Radosław Kujawa
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372dca2db8
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Remove instruction set.
|
2017-01-18 12:08:07 +01:00 |
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Radosław Kujawa
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e36a9c34fb
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Add accumulator addressing mode handling.
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2017-01-18 11:12:37 +01:00 |
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Radosław Kujawa
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23802b176f
|
Instruction set definition is now private to 65c02isa.c, has API.
Minor refactoring while here, splitting stuff.
|
2017-01-17 14:29:20 +01:00 |
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Radosław Kujawa
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aa362b81fd
|
Add structs representing current emulator state.
|
2017-01-17 11:28:42 +01:00 |
|
Radosław Kujawa
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d515954f44
|
Move reg_state struct to header, rename op to opcode.
|
2017-01-17 11:18:48 +01:00 |
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Radosław Kujawa
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0da3d6dc5f
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Instruction addressing modes now handled with enum.
While here imlpement instruciton printing for all addressing modes.
|
2017-01-17 00:42:31 +01:00 |
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Radosław Kujawa
|
a0821195c7
|
Also build static library and use it for tests.
|
2017-01-16 23:54:46 +01:00 |
|
Radosław Kujawa
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64e71a081f
|
Since this is a library, off with the main function now.
|
2017-01-16 23:54:24 +01:00 |
|
Radosław Kujawa
|
f298eaade0
|
rk65c02 is now a shared library.
|
2017-01-16 22:56:07 +01:00 |
|
Radosław Kujawa
|
b446b08271
|
Add missing argument to bus_finish() prototype.
|
2017-01-16 22:55:42 +01:00 |
|
Radosław Kujawa
|
26384ce27d
|
Add asserts to freeing the bus.
|
2017-01-16 21:34:56 +01:00 |
|
Radosław Kujawa
|
e7c81c0fbc
|
Initial import, skeleton...
|
2017-01-16 19:35:28 +01:00 |
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