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Author SHA1 Message Date
Radosław Kujawa
a50da41388 Implement AND emulation and test. 2017-01-20 10:41:56 +01:00
Radosław Kujawa
3bcc7bb096 Introduce instruction-independent status adjustment functions. 
For now only for negative and zero. Also use them in LDA emulation.
 2017-01-20 10:25:19 +01:00
Radosław Kujawa
5201cfdc87 Print operand hex vals during disassembly. 2017-01-20 09:46:33 +01:00
Radosław Kujawa
14233cf3ca Implement status flags for LDA emulation. 2017-01-20 09:11:34 +01:00
Radosław Kujawa
bcedb50e48 Clean up. 2017-01-20 09:11:22 +01:00
Radosław Kujawa
b498da3ac8 Add CLI skeleton. 2017-01-19 23:49:27 +01:00
Radosław Kujawa
f42f88c148 Add status register bits. 2017-01-19 14:06:19 +01:00
Radosław Kujawa
8d3f7266fb LDA emulation tests. 2017-01-19 11:50:11 +01:00
Radosław Kujawa
6b7ddbf865 LDA zero page emulation and test for it. 2017-01-19 11:49:05 +01:00
Radosław Kujawa
49b70f0e1f Make instruction data read more flexible and split from emulation of particular instruction. 2017-01-19 10:59:35 +01:00
Radosław Kujawa
87cafb607f Support loading ROMs from files, adjust nop test case. 2017-01-19 00:57:09 +01:00
Radosław Kujawa
abc209df99 Add emulation tests. 2017-01-19 00:21:00 +01:00
Radosław Kujawa
e7380477a9 Remove debug printfs. 2017-01-19 00:20:53 +01:00
Radosław Kujawa
73e4be2acc Add support for building test case ROMs with vasm. 
While here add first such ROM, for nop instruction test.
 2017-01-18 23:47:55 +01:00
Radosław Kujawa
92914d4aa0 Experiment with emulating opcode requring operands. 
Immediate lda now works.
 2017-01-18 22:37:00 +01:00
Radosław Kujawa
e7e30292d5 Fix incorrect instruction sizes. 2017-01-18 22:11:13 +01:00
Radosław Kujawa
380b524a51 Assign a separate identifier for all invalid nops. 2017-01-18 22:05:50 +01:00
Radosław Kujawa
52ce9bff8c Preliminary support for emulation of instructions. 
Some refactoring while here.
 2017-01-18 17:18:19 +01:00
Radosław Kujawa
f106e227cd Prepare structures for adding emulation of instructions. 2017-01-18 15:45:28 +01:00
Radosław Kujawa
d6876b38a1 Write down all 65C02 instructions. 2017-01-18 14:37:44 +01:00
Radosław Kujawa
3032baeac4 Temporarily disable assert checking if instr was implemented. 2017-01-18 14:37:24 +01:00
Radosław Kujawa
bd0eeea144 Adjust build process and instruction-related funcs. 
Due to new dynamically build 65c02isa.h header.
 2017-01-18 12:09:14 +01:00
Radosław Kujawa
611f51201f Generate instruction set from CSV file and awk script. 2017-01-18 12:08:55 +01:00
Radosław Kujawa
372dca2db8 Remove instruction set. 2017-01-18 12:08:07 +01:00
Radosław Kujawa
e36a9c34fb Add accumulator addressing mode handling. 2017-01-18 11:12:37 +01:00
Radosław Kujawa
23802b176f Instruction set definition is now private to 65c02isa.c, has API. 
Minor refactoring while here, splitting stuff.
 2017-01-17 14:29:20 +01:00
Radosław Kujawa
aa362b81fd Add structs representing current emulator state. 2017-01-17 11:28:42 +01:00
Radosław Kujawa
d515954f44 Move reg_state struct to header, rename op to opcode. 2017-01-17 11:18:48 +01:00
Radosław Kujawa
0da3d6dc5f Instruction addressing modes now handled with enum. 
While here imlpement instruciton printing for all addressing modes.
 2017-01-17 00:42:31 +01:00
Radosław Kujawa
5861d40352 When linking against static lib, the order matters. 2017-01-16 23:56:10 +01:00
Radosław Kujawa
a0821195c7 Also build static library and use it for tests. 2017-01-16 23:54:46 +01:00
Radosław Kujawa
64e71a081f Since this is a library, off with the main function now. 2017-01-16 23:54:24 +01:00
Radosław Kujawa
f298eaade0 rk65c02 is now a shared library. 2017-01-16 22:56:07 +01:00
Radosław Kujawa
b446b08271 Add missing argument to bus_finish() prototype. 2017-01-16 22:55:42 +01:00
Radosław Kujawa
0a43717337 Add first test cases (for bus access). 2017-01-16 22:54:51 +01:00
Radosław Kujawa
26384ce27d Add asserts to freeing the bus. 2017-01-16 21:34:56 +01:00
Radosław Kujawa
e7c81c0fbc Initial import, skeleton... 2017-01-16 19:35:28 +01:00
Radosław Kujawa
4fdc2e4de1 Initial commit 2017-01-16 19:33:02 +01:00