Radosław Kujawa
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8ede93fb0e
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Merge branch 'master' of github.com:rkujawa/rk65c02
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2017-01-26 23:22:56 +01:00 |
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Radosław Kujawa
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bfb042cd1a
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Add test for stepping mode.
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2017-01-26 23:22:40 +01:00 |
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Radosław Kujawa
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0e784db076
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Don't forget to link with utils.
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2017-01-26 21:37:54 +01:00 |
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Radosław Kujawa
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1da576c821
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Merge branch 'master' of github.com:rkujawa/rk65c02
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2017-01-26 17:27:22 +01:00 |
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Radosław Kujawa
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2ec6cb67ae
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Split ROM starting function into separate file.
It will also be used for other test programs than test_emulation.
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2017-01-26 13:11:37 +01:00 |
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Radosław Kujawa
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80b6848108
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Preliminary support for stepping.
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2017-01-26 13:11:00 +01:00 |
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Radosław Kujawa
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941e89173a
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Add struct with info about reason for stopping emulation.
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2017-01-26 12:52:40 +01:00 |
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Radosław Kujawa
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285d2ee828
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Initial state of the CPU has IRQ disable bit set.
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2017-01-25 21:17:18 +01:00 |
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Radosław Kujawa
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13ef3e2d08
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Add PHX, PLX, PHY, PLY emulation and test cases.
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2017-01-25 13:14:00 +01:00 |
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Radosław Kujawa
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acc0fad32e
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Add emulation of BIT instruction and test cases for it.
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2017-01-25 10:10:00 +01:00 |
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Radosław Kujawa
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7915657355
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Add bit testing macro.
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2017-01-25 10:09:50 +01:00 |
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Radosław Kujawa
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95db0b7dd2
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Add commented out debug message.
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2017-01-25 10:09:38 +01:00 |
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Radosław Kujawa
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a570afb007
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Add STA test cases for all addressing modes.
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2017-01-24 22:18:52 +01:00 |
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Radosław Kujawa
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47028b0e26
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Add commented out debug message.
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2017-01-24 22:18:21 +01:00 |
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Radosław Kujawa
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90b6c06e32
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Fix missing breaks in indirect zero page handling switch.
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2017-01-24 22:18:02 +01:00 |
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Radosław Kujawa
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3a4a0a06d3
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Add ORA tests, for all addressing modes.
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2017-01-24 16:37:55 +01:00 |
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Radosław Kujawa
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39aaca5034
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Correct indirect zero page Y behaviour.
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2017-01-24 16:37:10 +01:00 |
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Radosław Kujawa
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20a39a8d6c
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Correct wrong ORA indirect zero page X size.
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2017-01-24 16:36:39 +01:00 |
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Radosław Kujawa
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b047c4ff81
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Add test cases for TAX, TAY, TXA, TYA.
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2017-01-24 12:55:46 +01:00 |
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Radosław Kujawa
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cddba4c56b
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Don't hardcode ROM names in Makefile.
There's too many of them now, so the names are constructed from the
list of assembly files, automatically.
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2017-01-24 12:36:27 +01:00 |
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Radosław Kujawa
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09f0a828e3
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Add test cases for LDA addressing modes absolute X, absolute Y.
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2017-01-23 16:33:03 +01:00 |
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Radosław Kujawa
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342a188314
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Fix wrong mnemonic for absolute ORA.
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2017-01-23 15:39:10 +01:00 |
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Radosław Kujawa
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6c3a203cdc
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Support all AND addressing modes.
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2017-01-23 15:28:14 +01:00 |
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Radosław Kujawa
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0dd63f2bf0
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Add ROL and ROR emulation. Too old to ror and to rol!
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2017-01-23 15:25:32 +01:00 |
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Radosław Kujawa
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f9708ca049
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Add STA, STY, STX emulation.
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2017-01-23 15:02:21 +01:00 |
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Radosław Kujawa
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ee8a16a5ba
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Add ORA and EOR emulation.
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2017-01-23 14:53:05 +01:00 |
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Radosław Kujawa
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6b7298cf8d
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Avoid intermediate variable in AND emulation.
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2017-01-23 14:45:46 +01:00 |
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Radosław Kujawa
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aee947ad1f
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Don't forget to add LDY to CSV...
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2017-01-23 14:44:55 +01:00 |
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Radosław Kujawa
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552fad8a7e
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LDY emulation.
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2017-01-23 14:43:54 +01:00 |
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Radosław Kujawa
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5c38e5f05a
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Add emulation of LDX, TXA, TYA, TXS, TAX, TAY, TSX.
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2017-01-23 14:38:50 +01:00 |
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Radosław Kujawa
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3b2080403b
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Ignore .DS_Store
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2017-01-23 13:47:22 +01:00 |
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Radosław Kujawa
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ce492e6cd3
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Support all addressing variants of STZ.
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2017-01-23 13:46:17 +01:00 |
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Radosław Kujawa
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05f6599681
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BSD/OS X awk does not like hexadecimal constants.
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2017-01-23 13:41:31 +01:00 |
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Radosław Kujawa
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9c88afae2a
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BBRx and BBSx instructions have zero page relative addressing.
Add zero page relative as a separate addressing type and adjust
opcode definitions for these two type of opcodes.
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2017-01-23 12:17:06 +01:00 |
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Radosław Kujawa
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ee16c64310
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Implement absolute X, absolute Y addressing.
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2017-01-23 10:48:37 +01:00 |
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Radosław Kujawa
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452e4b3806
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Implement indirect zero page with X and indirect zero page with Y addressing.
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2017-01-23 10:29:19 +01:00 |
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Radosław Kujawa
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3cbede06f8
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Add test for LDA with absolute addressing.
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2017-01-23 10:28:44 +01:00 |
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Radosław Kujawa
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9e32c3e493
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Try to emulate all variants of LDA.
But some addressing modes are still unimplemented...
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2017-01-23 10:27:51 +01:00 |
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Radosław Kujawa
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87c424557e
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Implement aboslute addressing mode.
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2017-01-23 00:00:45 +01:00 |
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Radosław Kujawa
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5eede9333b
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Add emulation of PHP, PLP instructions and test cases for them.
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2017-01-22 23:01:24 +01:00 |
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Radosław Kujawa
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074ecdccc3
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No-operand INC has accumulator addressing mode, not implied.
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2017-01-22 22:44:08 +01:00 |
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Radosław Kujawa
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1460817230
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Correct mnemonic for LDX with Zero Page,Y addressing.
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2017-01-22 22:40:32 +01:00 |
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Radosław Kujawa
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fb7d4b28e7
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Add DEX, DEY emulation and test cases for them.
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2017-01-22 22:35:50 +01:00 |
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Radosław Kujawa
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52247f0ce4
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Implement CLC, SEC and test for them.
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2017-01-22 13:50:04 +01:00 |
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Radosław Kujawa
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473e0e2636
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Add INX, INY emulation and test cases.
Some comments while here.
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2017-01-22 13:07:21 +01:00 |
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Radosław Kujawa
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e763ca0d3a
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Avoid getting instruction definition again when emulating.
While here try to make program counter incrementation more universal
and flexible.
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2017-01-22 11:07:19 +01:00 |
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Radosław Kujawa
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c7633feb87
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Add STZ emulation.
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2017-01-21 21:46:35 +01:00 |
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Radosław Kujawa
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86c9c6414c
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Add function to write data onto bus according to choosen addressing mode.
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2017-01-21 21:43:31 +01:00 |
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Radosław Kujawa
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8abbb88d0d
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Fix dependencies for static lib building.
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2017-01-21 21:41:19 +01:00 |
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Radosław Kujawa
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2c7e67d69d
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Ignore headers generated during build and ROMs.
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2017-01-21 16:03:31 +01:00 |
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