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[bug]fixup some inverted busses
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@ -265,11 +265,14 @@ function chipStatus(){
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' NMI:' + readBit('nmi');
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var machine4 =
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' IR:' + hexByte(255 - readBits('notir', 8)) +
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' idl:' + hexByte(255 - readBits('idl', 8)) +
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' alu:' + hexByte(255 - readBits('alu', 8)) +
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' TCstate:' + readBit('clock1') + readBit('clock2') +
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readBit('t2') + readBit('t3') + readBit('t4') + readBit('t5');
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var machine5 =
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' idl:' + hexByte(readBits('idl', 8)) +
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' alu:' + hexByte(readBits('alu', 8)) +
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' idb:' +hexByte(readBits('idb',8)) +
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' dor:' + hexByte(readBits('dor',8));
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var machine6 =
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' notRdy0:' + readBit('notRdy0') +
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' fetch:' + readBit('fetch') +
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' clearIR:' + readBit('clearIR') +
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48
nodenames.js
48
nodenames.js
@ -185,14 +185,22 @@ sb4: 1405,
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sb5: 166,
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sb6: 1336,
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sb7: 1001,
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alu0: 394, // datapath state: ALU output
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alu1: 697,
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alu2: 276,
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alu3: 495,
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alu4: 1490,
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alu5: 893,
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alu6: 68,
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alu7: 1123,
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notalu0: 394, // datapath state: alu output storage node (inverse)
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notalu1: 697,
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notalu2: 276,
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notalu3: 495,
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notalu4: 1490,
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notalu5: 893,
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notalu6: 68,
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notalu7: 1123,
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alu0: 401, // datapath signal: ALU output
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alu1: 872,
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alu2: 1637,
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alu3: 1414,
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alu4: 606,
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alu5: 314,
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alu6: 331,
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alu7: 765,
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adl0: 413, // internal state: address latch low
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adl1: 1282,
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adl2: 1242,
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@ -217,14 +225,22 @@ idb4: 892,
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idb5: 1503,
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idb6: 833,
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idb7: 493,
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dor0: 222, // internal state: data output register
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dor1: 527,
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dor2: 1288,
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dor3: 823,
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dor4: 873,
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dor5: 1266,
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dor6: 1418,
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dor7: 158,
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notdor0: 222, // internal state: data output register (storage node)
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notdor1: 527,
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notdor2: 1288,
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notdor3: 823,
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notdor4: 873,
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notdor5: 1266,
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notdor6: 1418,
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notdor7: 158,
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dor0: 97, // internal signal: data output register
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dor1: 746,
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dor2: 1634,
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dor3: 444,
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dor4: 1088,
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dor5: 1453,
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dor6: 1415,
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dor7: 63,
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pd0: 758, // internal state: predecode register
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pd1: 361,
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pd2: 955,
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