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8d5038882842fc9fe7efc7dade45d05d404f8868
p6 and p7 were duplicates of their respective Pout-named nodes instead of
the phase 1 updated nodes of their storage complexes, as all the other
processor status register bits are (except for the B bit, of course).
Comment typo correction for cclk.
This is the JavaScript simulator from the visual5602.org project: www.visual6502.org/JSSim It includes a general purpose transistor-level simulator, layout browser, and the data from a 6502 revD chip. It also includes a similar simulator for the 6800 chip. Note the various licenses and Copyright associated with each file. Enjoy! - The Visual 6502 Team
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