114 lines
5.3 KiB
HTML
114 lines
5.3 KiB
HTML
<html>
|
|
<head> <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1" />
|
|
<title>Project Status Summary Page</title>
|
|
<link rel="stylesheet" type="text/css" href="projectstatuspage.css" />
|
|
<script type = "text/javascript" src="projectstatuspage.js"></script>
|
|
</head>
|
|
|
|
<body style="background-color:#f0f0ff;">
|
|
|
|
<table style="border:none;" width="100%" ><tr> <td class="outline">
|
|
<table width="100%" border="0" cellspacing="0" cellpadding="0"> <thead class="tablehead"><tr><th colspan="4">Project Settings</th><tr>
|
|
<tr> <td class="optionTitle" align="left"> Project Name</td> <td> impl1_syn</td> <td class="optionTitle" align="left"> Device Name</td> <td> impl1: Lattice MachXO2 : LCMXO2_7000HC</td> </tr>
|
|
<tr> <td class="optionTitle" align="left"> Implementation Name</td> <td> impl1</td> <td class="optionTitle" align="left"> Top Module</td> <td> FleaFPGA_Uno_E1</td> </tr>
|
|
</thead>
|
|
<tbody> <tr> <td class="optionTitle" align="left"> Pipelining</td> <td> 1</td> <td class="optionTitle" align="left"> Retiming</td> <td> 0</td> </tr>
|
|
<tr> <td class="optionTitle" align="left"> Resource Sharing</td> <td> 1</td> <td class="optionTitle" align="left"> Fanout Guide</td> <td> 1000</td> </tr>
|
|
<tr> <td class="optionTitle" align="left"> Disable I/O Insertion</td> <td> 0</td> <td class="optionTitle" align="left"> Disable Sequential Optimizations</td> <td> 0</td> </tr>
|
|
<tr> <td class="optionTitle" align="left"> Clock Conversion</td> <td> 1</td> <td class="optionTitle" align="left"> FSM Compiler</td> <td> 1</td> </tr>
|
|
|
|
</tbody>
|
|
</table><br> <table width="100%" border="1" cellspacing= "0" cellpadding= "0" >
|
|
<thead class="tablehead"><tr><th colspan="9">Run Status</th></tr></thead>
|
|
<tbody>
|
|
<tr>
|
|
<th align="left" width="17%">Job Name</th>
|
|
<th align="left">Status</th>
|
|
<td class="lnote" align="center" title="Notes"></td>
|
|
<td class="lwarn" align="center" title="Warnings"></td>
|
|
<td class="lerror" align="center" title="Errors"></td>
|
|
<th align="left">CPU Time</th>
|
|
<th align="left">Real Time</th>
|
|
<th align="left">Memory</th>
|
|
<th align="left">Date/Time</th>
|
|
</tr>
|
|
<tr>
|
|
<td class="optionTitle"> (compiler)</td><td>Complete</td>
|
|
<td>42</td>
|
|
<td>46</td>
|
|
<td>0</td>
|
|
<td>-</td>
|
|
<td>00m:01s</td>
|
|
<td>-</td>
|
|
<td><font size="-1">8/08/2019</font><br/><font size="-2">6:40:10 PM</font></td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td class="optionTitle"> (premap)</td><td>Complete</td>
|
|
<td>3</td>
|
|
<td>9</td>
|
|
<td>0</td>
|
|
<td>0m:00s</td>
|
|
<td>0m:00s</td>
|
|
<td>143MB</td>
|
|
<td><font size="-1">8/08/2019</font><br/><font size="-2">6:40:12 PM</font></td>
|
|
</tr>
|
|
|
|
<tr>
|
|
<td class="optionTitle"> (fpga_mapper)</td><td>Complete</td>
|
|
<td>23</td>
|
|
<td>8</td>
|
|
<td>0</td>
|
|
<td>0m:03s</td>
|
|
<td>0m:04s</td>
|
|
<td>161MB</td>
|
|
<td><font size="-1">8/08/2019</font><br/><font size="-2">6:40:17 PM</font></td>
|
|
</tr>
|
|
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
<table width="100%" border="1" cellspacing= "0" cellpadding= "0" >
|
|
<thead class="tablehead"><tr><th colspan="4">Area Summary</th></tr></thead>
|
|
<tfoot> <tr> <td class="optionTitle" colspan="4"></td></tr>
|
|
</tfoot>
|
|
<tbody> <tr>
|
|
<td title ="Total Register bits used" class="optionTitle" align="left">Register bits</td> <td>179</td>
|
|
<td title ="Total I/O cells used" class="optionTitle" align="left">I/O cells</td> <td>15</td>
|
|
</tr>
|
|
<tr>
|
|
<td title ="Total Block RAMs used" class="optionTitle" align="left">Block RAMs
|
|
(v_ram)</td> <td>9</td>
|
|
<td title ="Total DSPs used" class="optionTitle" align="left">DSPs
|
|
(dsp_used)</td> <td>0</td>
|
|
</tr>
|
|
<tr>
|
|
<td title ="Total ORCA LUTs used" class="optionTitle" align="left">ORCA LUTs
|
|
(total_luts)</td> <td>199</td>
|
|
<td class="optionTitle"></td><td></td></tr>
|
|
</tbody>
|
|
</table><br>
|
|
<table width="100%" border="1" cellspacing= "0" cellpadding= "0" >
|
|
<thead class="tablehead"><tr><th colspan="4">Timing Summary</th></tr></thead>
|
|
<tfoot> <tr> <td class="optionTitle" colspan="2"></td></tr>
|
|
</tfoot>
|
|
<tbody>
|
|
<tr><th class="optionTitle" align= "left ">Clock Name</th><th class="optionTitle" align= "left ">Req Freq</th><th class="optionTitle" align= "left ">Est Freq</th><th class="optionTitle" align= "left ">Slack</th></tr>
|
|
<tr> <td align="left">FleaFPGA_Uno_E1|sys_clock</td><td align="left">159.6 MHz</td><td align="left">135.7 MHz</td><td align="left">-1.106</td></tr>
|
|
<tr> <td align="left">dm7400_1|y1_inferred_clock</td><td align="left">164.6 MHz</td><td align="left">168.4 MHz</td><td align="left">0.136</td></tr>
|
|
<tr> <td align="left">dm7400_1|y3_inferred_clock</td><td align="left">314.4 MHz</td><td align="left">267.3 MHz</td><td align="left">-0.561</td></tr>
|
|
<tr> <td align="left">dm7427|y1_inferred_clock</td><td align="left">292.6 MHz</td><td align="left">249.0 MHz</td><td align="left">-0.598</td></tr>
|
|
<tr> <td align="left">System</td><td align="left">160.7 MHz</td><td align="left">152.1 MHz</td><td align="left">-0.354</td></tr>
|
|
</tbody>
|
|
</table>
|
|
<br>
|
|
<table width="100%" border="1" cellspacing= "0" cellpadding= "0" >
|
|
<thead class="tablehead"><tr><th colspan="4">Optimizations Summary</th></tr></thead>
|
|
<tbody> <tr>
|
|
<td title ="Non-gated/non-generated clock trees / Gated/generated clock trees" class="optionTitle" align="left">Combined Clock Conversion</td> <td>1 / 4</td>
|
|
<td class="optionTitle"></td><td></td></tr>
|
|
</tbody>
|
|
</table><br>
|
|
<br>
|
|
</td></tr></table></body>
|
|
</html> |