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https://github.com/nippur72/Apple1_MiST.git
synced 2025-02-28 18:29:27 +00:00
take ram out of apple1 module
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parent
2dbed93220
commit
68846df5d0
22
rtl/apple1.v
22
rtl/apple1.v
@ -30,6 +30,12 @@ module apple1(
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input uart_rx, // asynchronous serial data input from computer
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output uart_tx, // asynchronous serial data output to computer
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output uart_cts, // clear to send flag to computer
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// RAM interface
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output [15:0] ram_addr,
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output [7:0] ram_din,
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input [7:0] ram_dout,
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output ram_rd,
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output ram_wr,
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// I/O interface to keyboard
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input ps2_clk, // PS/2 keyboard serial clock input
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@ -43,6 +49,12 @@ module apple1(
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output vga_blu, // blue VGA signal
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input vga_cls // clear screen button
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);
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assign ram_addr = addr;
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assign ram_din = cpu_dout;
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assign ram_rd = ram_cs;
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assign ram_wr = we & ram_cs;
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//////////////////////////////////////////////////////////////////////////
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// Registers and Wires
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@ -102,16 +114,6 @@ module apple1(
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//////////////////////////////////////////////////////////////////////////
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// RAM and ROM
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// RAM
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wire [7:0] ram_dout;
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ram ram(
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.clk(clk14),
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.address(addr[12:0]),
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.w_en(we & ram_cs),
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.din(cpu_dout),
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.dout(ram_dout)
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);
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// WozMon ROM
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wire [7:0] rom_dout;
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rom_wozmon rom_wozmon(
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@ -126,6 +126,22 @@ pll pll
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/******************************************************************************************/
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/******************************************************************************************/
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// RAM
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wire [7:0] ram_dout;
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ram ram(
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.clk(clk14),
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.address(cpu_addr[12:0]),
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.w_en(cpu_wr),
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.din(cpu_dout),
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.dout(ram_dout)
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);
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// ram interface
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wire [15:0] cpu_addr;
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wire [7:0] cpu_dout;
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wire cpu_rd;
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wire cpu_wr;
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apple1 apple1
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(
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.clk14(clk14),
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@ -135,6 +151,13 @@ apple1 apple1
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.uart_tx(), // uart not connected
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.uart_cts(), // uart not connected
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// RAM interface
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.ram_addr (cpu_addr),
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.ram_din (cpu_dout),
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.ram_dout (ram_dout),
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.ram_rd (cpu_rd),
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.ram_wr (cpu_wr),
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.ps2_clk(ps2_kbd_clk),
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.ps2_din(ps2_kbd_data),
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