RC6502-Apple-1-Replica/RC6502 Reset Circuit/export/Reset circuit-Edge.Cuts.gm1

G04 #@! TF.FileFunction,Profile,NP*
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:11:08*
%MOMM*%
%LPD*%
G01*
G04 APERTURE LIST*
%ADD10C,0.100000*%
%ADD11C,0.150000*%
G04 APERTURE END LIST*
D10*
D11*
X92710000Y-147320000D02*
X92710000Y-111760000D01*
X191770000Y-111760000D02*
X191770000Y-147320000D01*
X92710000Y-111760000D02*
X191770000Y-111760000D01*
X191770000Y-147320000D02*
X92710000Y-147320000D01*
M02*
Exported files 2017-05-15 20:54:58 +00:00			`G04 #@! TF.FileFunction,Profile,NP*`
			`%FSLAX46Y46*%`
			`G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*`
Updated exports before sending to fabrication. 2017-06-19 22:21:20 +00:00			`G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:11:08*`
Exported files 2017-05-15 20:54:58 +00:00			`%MOMM*%`
			`%LPD*%`
			`G01*`
			`G04 APERTURE LIST*`
			`%ADD10C,0.100000*%`
			`%ADD11C,0.150000*%`
			`G04 APERTURE END LIST*`
			`D10*`
			`D11*`
			`X92710000Y-147320000D02*`
Reset circuit revision B Fixed floating inputs on hex inverter (needed when using HCT), added 74HCT74 in order to allow clock division by 2 and 4 (in case missing matching TTL quartz crystal or want even slower clock than stock). 2017-06-10 17:58:36 +00:00			`X92710000Y-111760000D01*`
			`X191770000Y-111760000D02*`
			`X191770000Y-147320000D01*`
			`X92710000Y-111760000D02*`
			`X191770000Y-111760000D01*`
Exported files 2017-05-15 20:54:58 +00:00			`X191770000Y-147320000D02*`
Reset circuit revision B Fixed floating inputs on hex inverter (needed when using HCT), added 74HCT74 in order to allow clock division by 2 and 4 (in case missing matching TTL quartz crystal or want even slower clock than stock). 2017-06-10 17:58:36 +00:00			`X92710000Y-147320000D01*`
Exported files 2017-05-15 20:54:58 +00:00			`M02*`