Yeah, I'm not going to get this within 10x10cm :-(

This commit is contained in:
Unknown 2017-06-17 23:06:33 +02:00
parent b638f58cf2
commit 2f51388fcc
14 changed files with 10403 additions and 321 deletions

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EESchema-DOCLIB Version 2.0
#
$CMP 4040
D Binary Counter 12 stages (Asynchronous)
K CMOS CNT CNT12
F cmos4000/MC14040.pdf
$ENDCMP
#
#End Doc Library

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EESchema-DOCLIB Version 2.0
#
$CMP 4040
D Binary Counter 12 stages (Asynchronous)
K CMOS CNT CNT12
F cmos4000/MC14040.pdf
$ENDCMP
#
$CMP 4040_vcc
D Binary Counter 12 stages (Asynchronous)
K CMOS CNT CNT12
F cmos4000/MC14040.pdf
$ENDCMP
#
#End Doc Library

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EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# 4040
#
DEF 4040 U 0 40 Y Y 1 F N
F0 "U" 100 650 50 H V C CNN
F1 "4040" 250 -650 50 H V C CNN
F2 "" 0 0 60 H I C CNN
F3 "" 0 0 60 H I C CNN
DRAW
X GND 8 0 -600 0 U 50 50 0 0 W N
X VCC 16 0 600 0 D 50 50 0 0 W N
S -350 600 350 -600 0 1 0 N
X Q11 1 650 -550 300 L 50 50 1 1 O
X Q5 2 650 50 300 L 50 50 1 1 O
X Q4 3 650 150 300 L 50 50 1 1 O
X Q6 4 650 -50 300 L 50 50 1 1 O
X Q3 5 650 250 300 L 50 50 1 1 O
X Q2 6 650 350 300 L 50 50 1 1 O
X Q1 7 650 450 300 L 50 50 1 1 O
X Q0 9 650 550 300 L 50 50 1 1 O
X CLK 10 -650 550 300 R 50 50 1 1 I IC
X Reset 11 -650 250 300 R 50 50 1 1 I
X Q8 12 650 -250 300 L 50 50 1 1 O
X Q7 13 650 -150 300 L 50 50 1 1 O
X Q9 14 650 -350 300 L 50 50 1 1 O
X Q10 15 650 -450 300 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# 4040_vcc
#
DEF 4040_vcc U 0 40 Y Y 1 F N
F0 "U" 100 650 50 H V C CNN
F1 "4040_vcc" 250 -650 50 H V C CNN
F2 "" 0 0 60 H I C CNN
F3 "" 0 0 60 H I C CNN
DRAW
X GND 8 0 -600 0 U 50 50 0 0 W N
X VCC 16 0 600 0 D 50 50 0 0 W N
S -350 600 350 -600 0 1 0 N
X Q11 1 650 -550 300 L 50 50 1 1 O
X Q5 2 650 50 300 L 50 50 1 1 O
X Q4 3 650 150 300 L 50 50 1 1 O
X Q6 4 650 -50 300 L 50 50 1 1 O
X Q3 5 650 250 300 L 50 50 1 1 O
X Q2 6 650 350 300 L 50 50 1 1 O
X Q1 7 650 450 300 L 50 50 1 1 O
X Q0 9 650 550 300 L 50 50 1 1 O
X CLK 10 -650 550 300 R 50 50 1 1 I IC
X Reset 11 -650 250 300 R 50 50 1 1 I
X Q8 12 650 -250 300 L 50 50 1 1 O
X Q7 13 650 -150 300 L 50 50 1 1 O
X Q9 14 650 -350 300 L 50 50 1 1 O
X Q10 15 650 -450 300 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
#End Library

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EESchema-DOCLIB Version 2.0
#
$CMP 4040
D Binary Counter 12 stages (Asynchronous)
K CMOS CNT CNT12
F cmos4000/MC14040.pdf
$ENDCMP
#
#End Doc Library

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EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# 4040
#
DEF 4040 U 0 40 Y Y 1 F N
F0 "U" 100 650 50 H V C CNN
F1 "4040" 250 -650 50 H V C CNN
F2 "" 0 0 60 H I C CNN
F3 "" 0 0 60 H I C CNN
DRAW
X VSS 8 0 -600 0 U 50 50 0 0 W N
X VDD 16 0 600 0 D 50 50 0 0 W N
S -350 600 350 -600 0 1 0 N
X Q11 1 650 -550 300 L 50 50 1 1 O
X Q5 2 650 50 300 L 50 50 1 1 O
X Q4 3 650 150 300 L 50 50 1 1 O
X Q6 4 650 -50 300 L 50 50 1 1 O
X Q3 5 650 250 300 L 50 50 1 1 O
X Q2 6 650 350 300 L 50 50 1 1 O
X Q1 7 650 450 300 L 50 50 1 1 O
X Q0 9 650 550 300 L 50 50 1 1 O
X CLK 10 -650 550 300 R 50 50 1 1 I IC
X Reset 11 -650 250 300 R 50 50 1 1 I
X Q8 12 650 -250 300 L 50 50 1 1 O
X Q7 13 650 -150 300 L 50 50 1 1 O
X Q9 14 650 -350 300 L 50 50 1 1 O
X Q10 15 650 -450 300 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
#End Library

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@ -1,16 +1,16 @@
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# 4040
# 4040_vcc
#
DEF 4040 U 0 40 Y Y 1 F N
DEF 4040_vcc U 0 40 Y Y 1 F N
F0 "U" 100 650 50 H V C CNN
F1 "4040" 250 -650 50 H V C CNN
F1 "4040_vcc" 250 -650 50 H V C CNN
F2 "" 0 0 60 H I C CNN
F3 "" 0 0 60 H I C CNN
DRAW
X VSS 8 0 -600 0 U 50 50 0 0 W N
X VDD 16 0 600 0 D 50 50 0 0 W N
X GND 8 0 -600 0 U 50 50 0 0 W N
X VCC 16 0 600 0 D 50 50 0 0 W N
S -350 600 350 -600 0 1 0 N
X Q11 1 650 -550 300 L 50 50 1 1 O
X Q5 2 650 50 300 L 50 50 1 1 O

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update=15/06/2017 19:12:05
update=17/06/2017 16:47:50
version=1
last_client=kicad
[pcbnew]
@ -23,6 +23,8 @@ ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[general]
version=1
[eeschema]
version=1
LibDir=
@ -56,5 +58,5 @@ LibName26=opto
LibName27=atmel
LibName28=contrib
LibName29=valves
[general]
version=1
LibName30=rca
LibName31=4040

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(fp_lib_table
(lib (name rca)(type KiCad)(uri "$(KIPRJMOD)/rca.pretty")(options "")(descr ""))
)

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EESchema-DOCLIB Version 2.0
#
$CMP CONN_COAXIAL
D coaxial connector (BNC, SMA, SMB, SMC, Cinch/RCA, ...)
K BNC SMA SMB SMC coaxial connector CINCH RCA
$ENDCMP
#
$CMP RCA_PLUG
D coaxial connector (BNC, SMA, SMB, SMC, Cinch/RCA, ...)
K BNC SMA SMB SMC coaxial connector CINCH RCA
$ENDCMP
#
#End Doc Library

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EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# CONN_COAXIAL
#
DEF CONN_COAXIAL J 0 40 Y N 1 F N
F0 "J" 10 120 50 H V C CNN
F1 "CONN_COAXIAL" 115 0 50 V V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
*BNC*
*SMA*
*SMB*
*SMC*
*Cinch*
$ENDFPLIST
DRAW
A -2 0 71 1636 0 0 1 10 N -70 20 70 0
A -1 0 71 0 -1638 0 1 10 N 70 0 -70 -20
C 0 0 20 0 1 8 N
P 2 0 1 0 -50 0 -20 0 N
P 2 0 1 0 0 -100 0 -70 N
X Ext 1 0 -200 100 U 50 50 1 1 P
X In 2 -150 0 100 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# RCA_PLUG
#
DEF RCA_PLUG J 0 40 Y N 1 F N
F0 "J" 10 120 50 H V C CNN
F1 "RCA_PLUG" 115 0 50 V V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
*BNC*
*SMA*
*SMB*
*SMC*
*Cinch*
$ENDFPLIST
DRAW
A -2 0 71 1636 0 0 1 10 N -70 20 70 0
A -1 0 71 0 -1638 0 1 10 N 70 0 -70 -20
C 0 0 20 0 1 8 N
P 2 0 1 0 -50 0 -20 0 N
P 2 0 1 0 0 -100 0 -70 N
X Ext 1 0 -200 100 U 50 50 1 1 P
X In 2 -150 0 100 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
#End Library

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(module w_conn_av:rca_yellow (layer F.Cu) (tedit 593D80CA)
(descr "RCA Audio connector, yellow, Pro Signal p/n PSG01547")
(tags "rca, audio")
(fp_text reference J3 (at 0 15.7988) (layer F.SilkS)
(effects (font (thickness 0.3048)))
)
(fp_text value Video (at 0 -8.89) (layer F.SilkS)
(effects (font (thickness 0.3048)))
)
(fp_circle (center -3.2512 -5.79882) (end -3.79984 -5.79882) (layer F.SilkS) (width 0.381))
(fp_circle (center 3.2512 -5.79882) (end 2.70002 -5.84962) (layer F.SilkS) (width 0.381))
(fp_circle (center 3.2512 4.0005) (end 2.70002 4.04876) (layer F.SilkS) (width 0.381))
(fp_circle (center -3.2512 4.0005) (end -3.79984 3.9497) (layer F.SilkS) (width 0.381))
(fp_circle (center -3.2512 0) (end -3.79984 0) (layer F.SilkS) (width 0.381))
(fp_circle (center 3.2512 0) (end 2.70002 -0.0508) (layer F.SilkS) (width 0.381))
(fp_line (start -4.30022 5.00126) (end -4.30022 14.00048) (layer F.SilkS) (width 0.381))
(fp_line (start -4.30022 14.00048) (end 4.30022 14.00048) (layer F.SilkS) (width 0.381))
(fp_line (start 4.30022 14.00048) (end 4.30022 5.00126) (layer F.SilkS) (width 0.381))
(fp_line (start 4.8006 -4.89966) (end 5.40004 -4.89966) (layer F.SilkS) (width 0.381))
(fp_line (start 5.40004 -4.89966) (end 5.40004 -3.0988) (layer F.SilkS) (width 0.381))
(fp_line (start 5.40004 -3.0988) (end 4.8006 -3.0988) (layer F.SilkS) (width 0.381))
(fp_line (start -5.40004 -4.89966) (end -4.8006 -4.89966) (layer F.SilkS) (width 0.381))
(fp_line (start -4.8006 -3.0988) (end -5.40004 -3.0988) (layer F.SilkS) (width 0.381))
(fp_line (start -5.40004 -3.0988) (end -5.40004 -4.89966) (layer F.SilkS) (width 0.381))
(fp_line (start -4.8006 -6.79958) (end -1.80086 -6.79958) (layer F.SilkS) (width 0.381))
(fp_line (start -1.80086 -6.79958) (end -1.80086 -5.99948) (layer F.SilkS) (width 0.381))
(fp_line (start -1.80086 -5.99948) (end 1.80086 -5.99948) (layer F.SilkS) (width 0.381))
(fp_line (start 1.80086 -5.99948) (end 1.80086 -6.79958) (layer F.SilkS) (width 0.381))
(fp_line (start 1.80086 -6.79958) (end 4.8006 -6.79958) (layer F.SilkS) (width 0.381))
(fp_line (start 4.8006 5.00126) (end -4.8006 5.00126) (layer F.SilkS) (width 0.381))
(fp_line (start -4.8006 4.99872) (end -4.8006 -6.80212) (layer F.SilkS) (width 0.381))
(fp_line (start 4.8006 -6.79958) (end 4.8006 5.00126) (layer F.SilkS) (width 0.381))
(pad 2 thru_hole oval (at 3.81 -3.81) (size 1.99898 3.19786) (drill oval 0.99568 2.1971) (layers *.Cu *.Mask F.SilkS))
(pad 1 thru_hole oval (at 0 -1.27) (size 3.19786 1.99898) (drill oval 2.1971 0.99568) (layers *.Cu *.Mask F.SilkS))
(pad 2 thru_hole oval (at -3.81 -3.81) (size 1.99898 3.19786) (drill oval 0.99568 2.1971) (layers *.Cu *.Mask F.SilkS))
(model walter/conn_av/rca_yellow.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)