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Exported schematic to pdf
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@ -271,6 +271,25 @@ X 4 4 200 -200 100 L 50 50 0 1 P
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ENDDRAW
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ENDDRAW
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ENDDEF
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ENDDEF
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#
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#
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# SW_Push_SPDT
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#
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DEF SW_Push_SPDT SW 0 0 Y N 1 F N
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F0 "SW" 0 170 50 H V C CNN
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F1 "SW_Push_SPDT" 0 -200 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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C -80 0 20 0 0 0 N
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C 80 -100 20 0 0 0 N
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P 2 0 0 0 0 40 0 120 N
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C 80 100 20 0 1 0 N
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P 2 0 1 0 -60 10 100 80 N
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X A 1 200 100 100 L 50 50 1 1 P
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X B 2 -200 0 100 R 50 50 1 1 P
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X C 3 200 -100 100 L 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# SW_SPDT
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# SW_SPDT
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#
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#
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DEF SW_SPDT SW 0 0 Y N 1 F N
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DEF SW_SPDT SW 0 0 Y N 1 F N
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@ -1,4 +1,4 @@
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update=22/12/2018 23:01:55
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update=25/12/2018 17:17:42
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version=1
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version=1
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last_client=kicad
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last_client=kicad
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[pcbnew]
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[pcbnew]
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@ -23,8 +23,6 @@ ModuleOutlineThickness=0.150000000000
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[cvpcb]
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[cvpcb]
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version=1
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version=1
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NetIExt=net
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NetIExt=net
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[general]
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version=1
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[eeschema]
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[eeschema]
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version=1
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version=1
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LibDir=
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LibDir=
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@ -63,3 +61,15 @@ LibName31=contrib
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LibName32=valves
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LibName32=valves
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LibName33=D:/ownCloud/Documents/Projects/RC6502/Templates/rc6502_backplane
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LibName33=D:/ownCloud/Documents/Projects/RC6502/Templates/rc6502_backplane
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LibName34=D:/ownCloud/Documents/Projects/RC6502/Templates/mc14495p1
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LibName34=D:/ownCloud/Documents/Projects/RC6502/Templates/mc14495p1
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[schematic_editor]
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version=1
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PageLayoutDescrFile=
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PlotDirectoryName=export
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SubpartIdSeparator=0
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SubpartFirstId=65
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NetFmtName=
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SpiceForceRefPrefix=0
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SpiceUseNetNumbers=0
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LabSize=60
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[general]
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version=1
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@ -955,7 +955,6 @@ Text GLabel 6875 6675 2 60 Output ~ 0
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RDY
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RDY
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Text GLabel 2775 6475 0 60 Output ~ 0
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Text GLabel 2775 6475 0 60 Output ~ 0
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SYNC
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SYNC
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NoConn ~ 3500 6275
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NoConn ~ 6275 7425
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NoConn ~ 6275 7425
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Text GLabel 5525 6875 0 60 Input ~ 0
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Text GLabel 5525 6875 0 60 Input ~ 0
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Phi0
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Phi0
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@ -1142,4 +1141,15 @@ Wire Wire Line
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7650 7650 7725 7650
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7650 7650 7725 7650
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Text Notes 11875 10300 0 60 ~ 0
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Text Notes 11875 10300 0 60 ~ 0
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RC6502 Debug card, adding bus monitor features and a single step circuit to the\ncomputer in order to aid with software and hardware development. Based on schematic\nincluded in the original Apple 1 manual.
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RC6502 Debug card, adding bus monitor features and a single step circuit to the\ncomputer in order to aid with software and hardware development. Based on schematic\nincluded in the original Apple 1 manual.
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$Comp
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L SW_Push_SPDT SW?
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U 1 1 5C205A95
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P 4475 7425
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F 0 "SW?" H 4475 7595 50 0000 C CNN
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F 1 "SW_Push_SPDT" H 4475 7225 50 0000 C CNN
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F 2 "" H 4475 7425 50 0001 C CNN
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F 3 "" H 4475 7425 50 0001 C CNN
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1 4475 7425
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1 0 0 -1
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$EndComp
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$EndSCHEMATC
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$EndSCHEMATC
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BIN
RC6502 Debug/export/RC6502 Debug.pdf
Normal file
BIN
RC6502 Debug/export/RC6502 Debug.pdf
Normal file
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