Unknown
|
aa70ce407a
|
Updated RAM board BOM
|
2019-02-16 22:25:30 +01:00 |
Unknown
|
bcedf3cb12
|
Fixed RAM board block select logic
|
2019-02-16 22:24:28 +01:00 |
Unknown
|
d0f6b369fd
|
Changed VDU CS logic ins schematic
|
2018-12-29 13:56:20 +01:00 |
Unknown
|
f36f8700e3
|
Flipped decoder inputs, added details to silkscreen.
|
2018-12-23 01:12:14 +01:00 |
Unknown
|
7dbb3f715b
|
Schematic done for enhanced RAM/ROM board
|
2018-12-21 19:00:00 +01:00 |
Unknown
|
e51a21e59a
|
RAM revision B
Fixed silkscreen notes by swapping high/low text, moved around tracks to make it a little more compact.
|
2017-06-10 17:50:00 +02:00 |
Unknown
|
789a7bdd18
|
Exported all schematics to PDF
|
2017-05-31 01:10:27 +02:00 |
Unknown
|
ef9b1b5ff8
|
Added files
|
2017-05-14 21:08:06 +02:00 |