Commit Graph

89 Commits

Author SHA1 Message Date
Unknown
2dda03be5e Reset circuit revision B
Fixed floating inputs on hex inverter (needed when using HCT), added 74HCT74 in order to allow clock division by 2 and 4 (in case missing matching TTL quartz crystal or want even slower clock than stock).
2017-06-10 19:58:36 +02:00
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e51a21e59a RAM revision B
Fixed silkscreen notes by swapping high/low text, moved around tracks to make it a little more compact.
2017-06-10 17:50:00 +02:00
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50a54fe487 CPU revision B
VP pin was added for W65c02, added SYNC and RDY pins and removed hex inverter.
2017-06-10 01:40:30 +02:00
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98c5cd0eda Moved JP5 pins to back of board, only want to solder wire across it and not actually mount pins. 2017-06-09 19:28:45 +02:00
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d51d4028a6 ROM revision B
JP5 inside U3 footprint is used to designate wether paging hardware is installed or not (skip  C3 and U3).
2017-06-09 19:10:10 +02:00
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d87aab7e04 Changed crystal footprint 2017-06-09 00:01:35 +02:00
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07ef8d2e37 Added Video Adapter 2017-06-09 00:01:14 +02:00
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5bdaa7bc14 Serial IO Revision B 2017-06-08 21:25:13 +02:00
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742a821703 Added BOM notice 2017-06-07 15:24:41 +02:00
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b01b57159d Added Serial IO README 2017-06-05 21:56:01 +02:00
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3049c75af1 Reformatted README, added links to each relevant module. 2017-06-02 20:59:40 +02:00
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3f5bc83e6f Updated README 2017-06-02 20:47:53 +02:00
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12f925f831 Added pictures of working setup 2017-06-02 20:24:48 +02:00
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1907bbab21 Added brackets around each byte received in debug 5. 2017-06-02 20:14:22 +02:00
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a738a248c7 Moved ATTiny Clock exported files 2017-06-01 23:28:31 +02:00
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96bee6750c Renamed arduino sketch 2017-06-01 23:12:41 +02:00
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6a96e92948 ... 2017-06-01 23:02:36 +02:00
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7e9fb543ca Use KBD interrupt to detect when computer has read character sent (Arduino doesn't support flow control in other direction) 2017-06-01 22:37:16 +02:00
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972f4c3b06 Adapted output so it works in PuTTY 2017-06-01 21:35:01 +02:00
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c9558608bf Working code. 2017-06-01 20:12:57 +02:00
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814df351cb Renamed some pins 2017-06-01 19:41:30 +02:00
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c55e064e7c Put RDY and Sync on the bus 2017-06-01 15:55:56 +02:00
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b8fb17b07d Pullups changed to 3.3K and added VP jumper 2017-06-01 15:45:21 +02:00
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789a7bdd18 Exported all schematics to PDF 2017-05-31 01:10:27 +02:00
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edb2a2de75 Dump pin status on setup 2017-05-31 00:35:14 +02:00
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0e60fa484e updated export 2017-05-30 22:35:45 +02:00
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58807dee46 Reorganized some code (still not working though) 2017-05-30 22:33:47 +02:00
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4d2d7a3bf4 Added pdf export 2017-05-29 22:20:24 +02:00
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ac3dd4da15 Non-functional version of serial communications 2017-05-29 22:19:38 +02:00
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995945b217 Added rom files 2017-05-29 22:18:52 +02:00
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f701c4b42c Added jumper select to decide if paging hardware installed 2017-05-29 22:18:40 +02:00
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a631560959 Added a couple images to gallery 2017-05-19 18:18:11 +02:00
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5bcb7ba543 Exported files 2017-05-15 22:54:58 +02:00
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b6add82d1b Mapped out PCB 2017-05-15 20:38:37 +02:00
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2c7afca939 Moved SPI breakout connector 2017-05-15 20:37:39 +02:00
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6f96e5c739 Added oscillator to CPU board 2017-05-14 21:51:30 +02:00
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4197312ab0 Updated net lists 2017-05-14 21:51:11 +02:00
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ef9b1b5ff8 Added files 2017-05-14 21:08:06 +02:00
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6b91f04ea0 Initial commit 2017-05-14 21:05:26 +02:00