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Moved old mappings to separate directory & fixed missing bit in ROM banking decoding

This commit is contained in:
flowenol 2021-03-01 23:53:27 +01:00
parent 0b2ce47d27
commit a6fb5ff5dc
10 changed files with 127 additions and 127 deletions
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13
mapping/address_decoder.eqn
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@ -1,17 +1,20 @@
chip GAL20V8 chip GAL22V10
NC=1 PHI=2 RW=3 MOD=4 A3=11 A4=10 A5=9 A6=8 A7=7 A8=6 A9=5 A10=19 GND=12 NC=1 PHI=2 RW=3 MOD=4 A3=11 A4=10 A5=9 A6=8 A7=7 A8=6 A9=5 A10=17 GND=12
A11=18 A12=17 A13=16 A14=15 A15=14 ROM=20 RAM=21 FF=22 BANK=23 VCC=24 A11=18 A12=16 A13=14 A14=15 A15=13 RAM2=19 RAM1=20 ROM=21 FF=22 BANK=23 VCC=24
equations equations
/ROM = /A15 * A14 * /A13 * /A12 * /A11 * RW * MOD /ROM = /A15 * A14 * /A13 * /A12 * /A11 * RW * MOD
+ /A15 * A14 * RW * BANK * MOD + /A15 * A14 * RW * BANK * MOD
+ A15 * /A14 * RW * BANK * MOD + A15 * /A14 * RW * BANK * MOD
/RAM = /A15 * A14 * /A13 * /A12 * A11 * /BANK * PHI * MOD /RAM1 = /A15 * /A14 * /A13 * A12 * PHI
+ /A15 * /A14 * A13 * /A12 * PHI
+ /A15 * /A14 * A13 * A12 * PHI
/RAM2 = /A15 * A14 * /A13 * /A12 * A11 * /BANK * PHI * MOD
+ A15 * /A14 * /BANK * PHI * MOD + A15 * /A14 * /BANK * PHI * MOD
+ /A15 * A14 * A13 * /BANK * PHI * MOD + /A15 * A14 * A13 * /BANK * PHI * MOD
+ /A15 * A14 * /A13 * A12 * /BANK * PHI * MOD + /A15 * A14 * /A13 * A12 * /BANK * PHI * MOD
+ /A15 * A14 * PHI * /MOD + /A15 * A14 * PHI * /MOD
+ A15 * /A14 * PHI * /MOD + A15 * /A14 * PHI * /MOD
FF = A3 * A4 * A5 * A6 * A7 * A8 * A9 * A10 * /A11 * /A12 * /A13 * A14 * /RW * PHI * MOD FF = A3 * A4 * A5 * A6 * A7 * A8 * A9 * A10 * /A11 * /A12 * /A13 * A14 * /A15 * /RW * PHI * MOD

60
mapping/address_decoder.jed
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@ -1,37 +1,35 @@
 
GAL20V8 GAL22V10
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101) EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993 Copyright (c) National Semiconductor Corporation 1990-1993
Assembled from "d:/ADDRES~1.EQN". Date: 9-29-120 Assembled from "d:/MAPPING/ADDRES~1.EQN". Date: 3-1-121
* *
NOTE PINS PHI:2 RW:3 MOD:4 A9:5 A8:6 A7:7 A6:8 A5:9 A4:10 A3:11* NOTE PINS PHI:2 RW:3 MOD:4 A9:5 A8:6 A7:7 A6:8 A5:9 A4:10 A3:11*
NOTE PINS GND:12 A15:14 A14:15 A13:16 A12:17 A11:18 A10:19 ROM:20* NOTE PINS GND:12 A15:13 A13:14 A14:15 A12:16 A10:17 A11:18 RAM2:19*
NOTE PINS RAM:21 FF:22 BANK:23 VCC:24* NOTE PINS RAM1:20 ROM:21 FF:22 BANK:23 VCC:24*
NOTE GALMODE REGISTERED* QF5828*QP24*F0*
QF2706*QP24*F0* L0440
L0000 11111111111111111111111111111111111111111111
1111111111111111111111111111111111111111 11110111101101110111011001010110010101100110*
0111101101110111010101100110011001010111* L0924
L0320 11111111111111111111111111111111111111111111
1111111111111111111111111111111111111111 11111111011101111111111011111110110111101110
0110111101111111111111011110111011011110 11011111011101111111111111111111110111111110
0110111101111111111111111111111111101101 11011111011101111111111111111111111011111101*
0110111101111111111111111111110111011110 L1496
0110111101111111111111111101111011011110 11111111111111111111111111111111111111111111
0111111110111111111111111111111111011110 11110111111111111111111111111101111011101110
0111111110111111111111111111111111101101* 11110111111111111111111111111110111011011110
L0640 11110111111111111111111111111101111011011110*
1111111111111111111111111111111111111111 L2156
1111011101111111111111101110111011011110 11111111111111111111111111111111111111111111
1101011101111111111111111111111111011110 11100111111101111111110111111110110111101110
1101011101111111111111111111111111101101* 11100111111101111111111111111111111011111101
L2560 11100111111101111111111111111111110111011110
10000000* 11100111111101111111111111111101110111101110
L2632 11110111111110111111111111111111110111111110
11111111* 11110111111110111111111111111111111011111101*
L2640 L5808
1100000011111110111100000000000000000000000000000000000000000000* 01110101010101010101*
L2704 C523C*
01*
C39F0*
0000 0000

49
mapping/address_decoder.log
View File

@ -1,8 +1,8 @@
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101) EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993 Copyright (c) National Semiconductor Corporation 1990-1993
Log file for d:/ADDRES~1.EQN Log file for d:/MAPPING/ADDRES~1.EQN
Device: 20V8 Device: G22V10
Pin Label Type Pin Label Type
--- ----- ---- --- ----- ----
@ -17,14 +17,15 @@ Pin Label Type
10 A4 pos,com input 10 A4 pos,com input
11 A3 pos,com input 11 A3 pos,com input
12 GND ground pin 12 GND ground pin
14 A15 pos,com input 13 A15 pos,com input
14 A13 pos,com input
15 A14 pos,com input 15 A14 pos,com input
16 A13 pos,com input 16 A12 pos,com input
17 A12 pos,com input 17 A10 pos,com input
18 A11 pos,com input 18 A11 pos,com input
19 A10 pos,com input 19 RAM2 neg,trst,com output
20 ROM neg,trst,com output 20 RAM1 neg,trst,com output
21 RAM neg,trst,com output 21 ROM neg,trst,com output
22 FF pos,trst,com output 22 FF pos,trst,com output
23 BANK pos,com input 23 BANK pos,com input
24 VCC power pin 24 VCC power pin
@ -35,20 +36,22 @@ Copyright (c) National Semiconductor Corporation 1990-1993
Device Utilization: Device Utilization:
No of dedicated inputs used : 12/12 (100.0%) No of dedicated inputs used : 12/12 (100.0%)
No of feedbacks used as dedicated inputs : 5/8 (62.5%) No of feedbacks used as dedicated inputs : 5/10 (50.0%)
No of feedbacks used as dedicated outputs : 3/8 (37.5%) No of feedbacks used as dedicated outputs : 4/10 (40.0%)
------------------------------------------ ------------------------------------------
Pin Label Terms Usage Pin Label Terms Usage
------------------------------------------ ------------------------------------------
22 FF.oe 1/1 (100.0%) 22 FF.oe 1/1 (100.0%)
22 FF 1/7 (14.3%) 22 FF 1/10 (10.0%)
21 RAM.oe 1/1 (100.0%) 21 ROM.oe 1/1 (100.0%)
21 RAM 6/7 (85.7%) 21 ROM 3/12 (25.0%)
20 ROM.oe 1/1 (100.0%) 20 RAM1.oe 1/1 (100.0%)
20 ROM 3/7 (42.9%) 20 RAM1 3/14 (21.4%)
19 RAM2.oe 1/1 (100.0%)
19 RAM2 6/16 (37.5%)
------------------------------------------ ------------------------------------------
Total Terms 13/64 (20.3%) Total Terms 17/132 (12.9%)
------------------------------------------ ------------------------------------------
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101) EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
@ -61,13 +64,13 @@ Copyright (c) National Semiconductor Corporation 1990-1993
CLK | 1 24 | VCC CLK | 1 24 | VCC
PHI | 2 23 | BANK PHI | 2 23 | BANK
RW | 3 22 | FF RW | 3 22 | FF
MOD | 4 21 | RAM MOD | 4 21 | ROM
A9 | 5 20 | ROM A9 | 5 20 | RAM1
A8 | 6 19 | A10 A8 | 6 19 | RAM2
A7 | 7 18 | A11 A7 | 7 18 | A11
A6 | 8 17 | A12 A6 | 8 17 | A10
A5 | 9 16 | A13 A5 | 9 16 | A12
A4 | 10 15 | A14 A4 | 10 15 | A14
A3 | 11 14 | A15 A3 | 11 14 | A13
GND | 12 13 | /OE GND | 12 13 | A15
|______________| |______________|

35
mapping/address_decoder_v2.jed
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@ -1,35 +0,0 @@

GAL22V10
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993
Assembled from "d:/APPLE1~5/MAPPING/ADDRES~4.EQN". Date: 2-26-121
*
NOTE PINS PHI:2 RW:3 MOD:4 A9:5 A8:6 A7:7 A6:8 A5:9 A4:10 A3:11*
NOTE PINS GND:12 A15:13 A13:14 A14:15 A12:16 A10:17 A11:18 RAM2:19*
NOTE PINS RAM1:20 ROM:21 FF:22 BANK:23 VCC:24*
QF5828*QP24*F0*
L0440
11111111111111111111111111111111111111111111
11110111101101110111011001010110010101100111*
L0924
11111111111111111111111111111111111111111111
11111111011101111111111011111110110111101110
11011111011101111111111111111111110111111110
11011111011101111111111111111111111011111101*
L1496
11111111111111111111111111111111111111111111
11110111111111111111111111111101111011101110
11110111111111111111111111111110111011011110
11110111111111111111111111111101111011011110*
L2156
11111111111111111111111111111111111111111111
11100111111101111111110111111110110111101110
11100111111101111111111111111111111011111101
11100111111101111111111111111111110111011110
11100111111101111111111111111101110111101110
11110111111110111111111111111111110111111110
11110111111110111111111111111111111011111101*
L5808
01110101010101010101*
C52BC*
0000

11
mapping/address_decoder_v2.eqn → mapping/old/address_decoder.eqn
View File

@ -1,17 +1,14 @@
chip GAL22V10 chip GAL20V8
NC=1 PHI=2 RW=3 MOD=4 A3=11 A4=10 A5=9 A6=8 A7=7 A8=6 A9=5 A10=17 GND=12 NC=1 PHI=2 RW=3 MOD=4 A3=11 A4=10 A5=9 A6=8 A7=7 A8=6 A9=5 A10=19 GND=12
A11=18 A12=16 A13=14 A14=15 A15=13 RAM2=19 RAM1=20 ROM=21 FF=22 BANK=23 VCC=24 A11=18 A12=17 A13=16 A14=15 A15=14 ROM=20 RAM=21 FF=22 BANK=23 VCC=24
equations equations
/ROM = /A15 * A14 * /A13 * /A12 * /A11 * RW * MOD /ROM = /A15 * A14 * /A13 * /A12 * /A11 * RW * MOD
+ /A15 * A14 * RW * BANK * MOD + /A15 * A14 * RW * BANK * MOD
+ A15 * /A14 * RW * BANK * MOD + A15 * /A14 * RW * BANK * MOD
/RAM1 = /A15 * /A14 * /A13 * A12 * PHI /RAM = /A15 * A14 * /A13 * /A12 * A11 * /BANK * PHI * MOD
+ /A15 * /A14 * A13 * /A12 * PHI
+ /A15 * /A14 * A13 * A12 * PHI
/RAM2 = /A15 * A14 * /A13 * /A12 * A11 * /BANK * PHI * MOD
+ A15 * /A14 * /BANK * PHI * MOD + A15 * /A14 * /BANK * PHI * MOD
+ /A15 * A14 * A13 * /BANK * PHI * MOD + /A15 * A14 * A13 * /BANK * PHI * MOD
+ /A15 * A14 * /A13 * A12 * /BANK * PHI * MOD + /A15 * A14 * /A13 * A12 * /BANK * PHI * MOD

37
mapping/old/address_decoder.jed Normal file
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@ -0,0 +1,37 @@

GAL20V8
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993
Assembled from "d:/ADDRES~1.EQN". Date: 9-29-120
*
NOTE PINS PHI:2 RW:3 MOD:4 A9:5 A8:6 A7:7 A6:8 A5:9 A4:10 A3:11*
NOTE PINS GND:12 A15:14 A14:15 A13:16 A12:17 A11:18 A10:19 ROM:20*
NOTE PINS RAM:21 FF:22 BANK:23 VCC:24*
NOTE GALMODE REGISTERED*
QF2706*QP24*F0*
L0000
1111111111111111111111111111111111111111
0111101101110111010101100110011001010111*
L0320
1111111111111111111111111111111111111111
0110111101111111111111011110111011011110
0110111101111111111111111111111111101101
0110111101111111111111111111110111011110
0110111101111111111111111101111011011110
0111111110111111111111111111111111011110
0111111110111111111111111111111111101101*
L0640
1111111111111111111111111111111111111111
1111011101111111111111101110111011011110
1101011101111111111111111111111111011110
1101011101111111111111111111111111101101*
L2560
10000000*
L2632
11111111*
L2640
1100000011111110111100000000000000000000000000000000000000000000*
L2704
01*
C39F0*
0000

49
mapping/address_decoder_v2.log → mapping/old/address_decoder.log
View File

@ -1,8 +1,8 @@
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101) EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993 Copyright (c) National Semiconductor Corporation 1990-1993
Log file for d:/APPLE1~5/MAPPING/ADDRES~4.EQN Log file for d:/ADDRES~1.EQN
Device: G22V10 Device: 20V8
Pin Label Type Pin Label Type
--- ----- ---- --- ----- ----
@ -17,15 +17,14 @@ Pin Label Type
10 A4 pos,com input 10 A4 pos,com input
11 A3 pos,com input 11 A3 pos,com input
12 GND ground pin 12 GND ground pin
13 A15 pos,com input 14 A15 pos,com input
14 A13 pos,com input
15 A14 pos,com input 15 A14 pos,com input
16 A12 pos,com input 16 A13 pos,com input
17 A10 pos,com input 17 A12 pos,com input
18 A11 pos,com input 18 A11 pos,com input
19 RAM2 neg,trst,com output 19 A10 pos,com input
20 RAM1 neg,trst,com output 20 ROM neg,trst,com output
21 ROM neg,trst,com output 21 RAM neg,trst,com output
22 FF pos,trst,com output 22 FF pos,trst,com output
23 BANK pos,com input 23 BANK pos,com input
24 VCC power pin 24 VCC power pin
@ -36,22 +35,20 @@ Copyright (c) National Semiconductor Corporation 1990-1993
Device Utilization: Device Utilization:
No of dedicated inputs used : 12/12 (100.0%) No of dedicated inputs used : 12/12 (100.0%)
No of feedbacks used as dedicated inputs : 5/10 (50.0%) No of feedbacks used as dedicated inputs : 5/8 (62.5%)
No of feedbacks used as dedicated outputs : 4/10 (40.0%) No of feedbacks used as dedicated outputs : 3/8 (37.5%)
------------------------------------------ ------------------------------------------
Pin Label Terms Usage Pin Label Terms Usage
------------------------------------------ ------------------------------------------
22 FF.oe 1/1 (100.0%) 22 FF.oe 1/1 (100.0%)
22 FF 1/10 (10.0%) 22 FF 1/7 (14.3%)
21 ROM.oe 1/1 (100.0%) 21 RAM.oe 1/1 (100.0%)
21 ROM 3/12 (25.0%) 21 RAM 6/7 (85.7%)
20 RAM1.oe 1/1 (100.0%) 20 ROM.oe 1/1 (100.0%)
20 RAM1 3/14 (21.4%) 20 ROM 3/7 (42.9%)
19 RAM2.oe 1/1 (100.0%)
19 RAM2 6/16 (37.5%)
------------------------------------------ ------------------------------------------
Total Terms 17/132 (12.9%) Total Terms 13/64 (20.3%)
------------------------------------------ ------------------------------------------
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101) EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
@ -64,13 +61,13 @@ Copyright (c) National Semiconductor Corporation 1990-1993
CLK | 1 24 | VCC CLK | 1 24 | VCC
PHI | 2 23 | BANK PHI | 2 23 | BANK
RW | 3 22 | FF RW | 3 22 | FF
MOD | 4 21 | ROM MOD | 4 21 | RAM
A9 | 5 20 | RAM1 A9 | 5 20 | ROM
A8 | 6 19 | RAM2 A8 | 6 19 | A10
A7 | 7 18 | A11 A7 | 7 18 | A11
A6 | 8 17 | A10 A6 | 8 17 | A12
A5 | 9 16 | A12 A5 | 9 16 | A13
A4 | 10 15 | A14 A4 | 10 15 | A14
A3 | 11 14 | A13 A3 | 11 14 | A15
GND | 12 13 | A15 GND | 12 13 | /OE
|______________| |______________|

0
mapping/address_decoder_onlyram.eqn → mapping/old/address_decoder_onlyram.eqn
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0
mapping/address_decoder_onlyram.jed → mapping/old/address_decoder_onlyram.jed
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0
mapping/address_decoder_onlyram.log → mapping/old/address_decoder_onlyram.log
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