fixed pins configuration on address decoder && limited ROM address space

README.md

@@ -14,7 +14,7 @@ need some other standard. The best way to connect the device to a regular modern
 
 | address | function |
 | --- | --- |
-| `$C100-$CFFF` | address space reserved for on-board ROM |
+| `$C100-$C7FF` | address space reserved for on-board ROM |
 | `$C100` | the original ACI loader program adapted to the A1SI |
 | `$C300` | "teletype on apple-1" test program - the data from remote terminal appears on Apple-1 screen |
 | `$C400` | "teletype on remote" test program - the data from Apple-1 appears on remote terminal |
@@ -30,7 +30,7 @@ entries for programmers:
 | `$C081` | write address - the location for data to be written via the interface, first write to this address switches the device to write mode |
 | `$C23A` | software reset routine - resets the MCU |
 | `$C1EC` | block read routine - reads data from the interface to the specified address range |
-| `$C213` | block write routine - writes the data via the interface from the specified address range  |
+| `$C213` | block write routine - writes the data from the specified address range via the interface |
 | `$0034` | lower byte of the end address for block read/write routines |
 | `$0035` | upper byte of the end address for block read/write routines |
 | `$0036` | lower byte of the beginning address for block read/write routines |

mapping/address_decoder.jed

@@ -2,20 +2,19 @@
 GAL20V8
 EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
 Copyright (c) National Semiconductor Corporation 1990-1993
-Assembled from "d:/APPLE1~2/ADDRES~1.EQN". Date: 12-28-120
+Assembled from "c:\ADDRES~1.EQN". Date: 3-4-121
 *
 NOTE PINS RW:2 A8:3 A7:4 A6:5 A5:6 A4:7 A3:8 A2:9 A1:10 A0:11*
-NOTE PINS GND:12 A9:14 A10:15 A11:16 SR:17 RD:18 WD:19 ROM:20*
+NOTE PINS GND:12 A11:14 A10:15 A9:16 SR:17 RD:18 WD:19 ROM:20*
 NOTE PINS RES:21 PHI:22 R:23 VCC:24*
 NOTE GALMODE SMALL*
 QF2706*QP24*F0*
 L0320
 0111101010111011101110111010101010100111*
 L0640
-0111011011111111111111111111111111111111
+0111011011111111111111111111111111101111
-0111111011111111111111111111111111011111
+0111111011111111111111111101111111101111
-0111111011111111111111111111110111111111
+0111111011111111111111111111110111101111
-0111111011111111111111111101111111111111
 0111101001110111011101110110011011101111*
 L0960
 1011101001011011101110111010101010100111*
@@ -28,8 +27,8 @@ L2560
 L2632
 10000011*
 L2640
-0000000010000000111110001000000010000000100000000000000000000000*
+0000000010000000111100001000000010000000100000000000000000000000*
 L2704
 10*
-C236B*
+C1ECD*
 0000

mapping/address_decoder.log

@@ -1,7 +1,7 @@
 EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
 Copyright (c) National Semiconductor Corporation 1990-1993
 
-Log file for d:/APPLE1~2/ADDRES~1.EQN
+Log file for c:\ADDRES~1.EQN
 Device: 20V8
 
 Pin   Label               Type
@@ -17,9 +17,9 @@ Pin   Label               Type
 10    A1                  pos,com input
 11    A0                  pos,com input
 12    GND                 ground pin
-14    A9                  pos,com input
+14    A11                 pos,com input
 15    A10                 pos,com input
-16    A11                 pos,com input
+16    A9                  pos,com input
 17    SR                  pos,com output
 18    RD                  pos,com output
 19    WD                  pos,com output
@@ -43,12 +43,12 @@ No of feedbacks used as dedicated outputs :  3/6  (50.0%)
 		Pin   Label                 Terms Usage
 		------------------------------------------
 		21    RES                   1/8   (12.5%)
-		20    ROM                   5/8   (62.5%)
+		20    ROM                   4/8   (50.0%)
 		19    WD                    1/8   (12.5%)
 		18    RD                    1/8   (12.5%)
 		17    SR                    1/8   (12.5%)
 		------------------------------------------
-		Total Terms                 9/64  (14.1%)
+		Total Terms                 8/64  (12.5%)
 		------------------------------------------
 
 EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
@@ -66,8 +66,8 @@ Copyright (c) National Semiconductor Corporation 1990-1993
                           A5 |  6        19 | WD
                           A4 |  7        18 | RD
                           A3 |  8        17 | SR
-                          A2 |  9        16 | A11
+                          A2 |  9        16 | A9
                           A1 | 10        15 | A10
-                          A0 | 11        14 | A9
+                          A0 | 11        14 | A11
-                         GND | 12        13 | 
+                         GND | 12        13 |
                              |______________|

mapping/addressdecoder.eqn

@@ -1,7 +1,7 @@
 chip  GAL20V8
 
 NC3=1 RW=2 A0=11 A1=10 A2=9 A3=8 A4=7 A5=6 A6=5 A7=4 A8=3 GND=12
-A9=14 A10=15 A11=16 SR=17 RD=18 WD=19 ROM=20 RES=21 PHI=22
+A9=16 A10=15 A11=14 SR=17 RD=18 WD=19 ROM=20 RES=21 PHI=22
 R=23 VCC=24
 
 equations
@@ -9,9 +9,8 @@ equations
 SR = /A0 * /A1 * /A2 * /A3 * /A4 * /A5 * /A6 * /A7 * /A8 * /A9 * /A10 * /A11 * /R * RW
 RD = /A0 * /A1 * /A2 * /A3 * /A4 * /A5 * /A6 * A7 * /A8 * /A9 * /A10 * /A11 * /R * RW
 WD = A0 * /A1 * /A2 * /A3 * /A4 * /A5 * /A6 * A7 * /A8 * /A9 * /A10 * /A11 * /R * /RW * PHI
-/ROM = A8 * /R * RW
+/ROM = /A11 * A8 * /R * RW
-    + A9 * /R * RW
+    + /A11 * A9 * /R * RW
-    + A10 * /R * RW
+    + /A11 * A10 * /R * RW
-    + A11 * /R * RW
     + A2 * A3 * A4 * A5 * A6 * A7 * /A8 * /A9 * /A10 * /A11 * /R * RW
 RES = A0 * /A1 * /A2 * /A3 * /A4 * /A5 * /A6 * /A7 * /A8 * /A9 * /A10 * /A11 * /R * RW