Apple-1-HW
/
verilog-apple-one
mirror of https://github.com/alangarf/apple-one.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Updated the omilex board support

This commit is contained in:
Alan Garfield 2018-02-14 11:38:26 +11:00
parent 7ef0df07da
commit 78b3c6f5c6
7 changed files with 85 additions and 51 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

31
boards/olimex_ice40hx8k_evb_ice40-io/README.md Normal file
View File

@ -0,0 +1,31 @@
# Olimex iCE40HX8K-EVB + ICE40_IO support
This adds support for building the apple one design for [Olimex iCE40hx8k-evb board](https://www.olimex.com/Products/FPGA/iCE40/iCE40HX8K-EVB/open-source-hardware) with attached [Olimex iCE40-IO extension](https://www.olimex.com/Products/FPGA/iCE40/iCE40-IO/open-source-hardware) for vga and ps2
## Peripheral support
VGA port is working throught the iCE40-IO expansion.
A usb-serial converter can be attached on pins 5(RX), 7(TX), 9(CTS) on either the iCE40-IO extension or witout it directly to the header of the FPGA board (pin out is the same).
Consult the schematics for [iCE40-IO](https://github.com/OLIMEX/iCE40-IO/raw/master/ICE40-IO_Rev_A.pdf) and
[iCE40HX8K-EVB](https://github.com/OLIMEX/iCE40HX8K-EVB/blob/master/HARDWARE/REV-B/iCE40HX8K-EVB_Rev_B.pdf) for extension header pinmap.
This port is using 1 PLL for generating the target 25Mhz clock.
## Building
Install a recent IceStorm toolchain, and:
```
$ cd yosys
$ make
```
## Use
There are 2 possible ways for flashing the board:
1. [Olimex OLIMEXINO-32U4 as programmer](https://www.olimex.com/wiki/ICE40HX1K-EVB#Preparing_OLIMEXINO-32U4_as_programmer)
2. [Iceprog with Raspberry PI](https://www.olimex.com/wiki/ICE40HX1K-EVB#Iceprog_with_Raspberry_PI)
To load BASIC type "E000R" with CAPS LOCK on.

6
boards/olimex_ice40hx8k_evb_yosys/ice40hx8k.pcf → boards/olimex_ice40hx8k_evb_ice40-io/ice40hx8k.pcf
View File

@ -9,7 +9,7 @@ set_io uart_rx E4
set_io uart_tx B2
set_io uart_cts F5
### Buttons
set_io button[0] K11
set_io button[1] P13
@ -26,3 +26,7 @@ set_io vga_g[2] H6
set_io vga_b[0] F1
set_io vga_b[1] H4
set_io vga_b[2] G2
### PS/2 Keyboard
set_io ps2_clk G1
set_io ps2_din J5

0
boards/olimex_ice40hx8k_evb_yosys/Makefile → boards/olimex_ice40hx8k_evb_ice40-io/yosys/Makefile
View File

1
boards/olimex_ice40hx8k_evb_ice40-io/yosys/ice40hx8k.pcf Symbolic link
View File

@ -0,0 +1 @@
../ice40hx8k.pcf

28
boards/olimex_ice40hx8k_evb_yosys/README.md
View File

@ -1,28 +0,0 @@
# Olimex iCE40hx8k-evb support
This adds support for building apple one design for [Olimex iCE40hx8k-evb board](https://www.olimex.com/Products/FPGA/iCE40/iCE40HX8K-EVB/open-source-hardware) with attached [Olimex iCE40-IO extension](https://www.olimex.com/Products/FPGA/iCE40/iCE40-IO/open-source-hardware) for vga and ps2
## Peripheral support
VGA port is working trought the iCE40-IO expansion.
A usb-serial converter can be attached on pins 5(RX), 7(TX), 9(CTS) on either the iCE40-IO extension or witout it directly to the header of the FPGA board (pin out is the same). Consult the schematics for [iCE40-IO](https://github.com/OLIMEX/iCE40-IO/raw/master/ICE40-IO_Rev_A.pdf) and [iCE40HX8K-EVB](https://github.com/OLIMEX/iCE40HX8K-EVB/blob/master/HARDWARE/REV-B/iCE40HX8K-EVB_Rev_B.pdf) for extension header pinmap.
The iCE40-IO board has a ps2 connector you can use if you have a ps2 keyboard but it's not edded to the design pin map.
This port is using 1 PLL for generating the target 25Mhz clock.
## Building
Install a recent IceStorm toolchain, and:
make
## Use
There are 2 possible ways for flashing the board:
1. [Olimex OLIMEXINO-32U4 as programmer](https://www.olimex.com/wiki/ICE40HX1K-EVB#Preparing_OLIMEXINO-32U4_as_programmer)
2. [Iceprog with Raspberry PI](https://www.olimex.com/wiki/ICE40HX1K-EVB#Iceprog_with_Raspberry_PI)
To load BASIC type "E000R" with CAPS LOCK on.

16
rtl/boards/ice40hx8k-b-evn/apple1_hx8k.v
View File

@ -37,20 +37,20 @@ module apple1_top #(
output uart_cts, // clear to send flag to computer
// I/O interface to keyboard
input ps2_clk, // PS/2 keyboard serial clock input
input ps2_din, // PS/2 keyboard serial data input
input ps2_clk, // PS/2 keyboard serial clock input
input ps2_din, // PS/2 keyboard serial data input
// Outputs to VGA display
output vga_h_sync, // hozizontal VGA sync pulse
output vga_v_sync, // vertical VGA sync pulse
output reg vga_red, // red VGA signal
output reg vga_grn, // green VGA signal
output reg vga_blu, // blue VGA signal
output vga_h_sync, // hozizontal VGA sync pulse
output vga_v_sync, // vertical VGA sync pulse
output reg vga_red, // red VGA signal
output reg vga_grn, // green VGA signal
output reg vga_blu, // blue VGA signal
// Debugging ports
output [7:0] led, // 8 LEDs on the iCE40HX8K board
output [7:0] ledx, // 8 LEDs on optionally attached YL-4 board
input [3:0] button // 4 buttons on optionall attached YL-4 board
input [3:0] button // 4 buttons on optionally attached YL-4 board
);
wire clk25;

54
rtl/boards/olimex_ice40hx8k/apple1_hx8k.v
View File

@ -15,14 +15,20 @@
// specific language governing permissions and limitations
// under the License.
//
// Description: Apple 1 implementation for the iCE40HX8K dev
// board.
// Description: Apple 1 implementation for the Omilex iCE40HX8K +
// the ICE40-IO interface
//
// Author.....: Alan Garfield
// Date.......: 26-1-2018
//
module apple1_top(
module apple1_top #(
parameter BASIC_FILENAME = "../../../roms/basic.hex",
parameter FONT_ROM_FILENAME = "../../../roms/vga_font_bitreversed.hex",
parameter RAM_FILENAME = "../../../roms/ram.hex",
parameter VRAM_FILENAME = "../../../roms/vga_vram.bin",
parameter WOZMON_ROM_FILENAME = "../../../roms/wozmon.hex"
) (
input clk, // 100 MHz board clock
// I/O interface to computer
@ -30,19 +36,26 @@ module apple1_top(
output uart_tx, // asynchronous serial data output to computer
output uart_cts, // clear to send flag to computer
// Outputs to VGA display
output vga_h_sync, // hozizontal VGA sync pulse
output vga_v_sync, // vertical VGA sync pulse
output [2:0] vga_r, // red VGA signal
output [2:0] vga_g, // green VGA signal
output [2:0] vga_b, // blue VGA signal
// I/O interface to keyboard
input ps2_clk, // PS/2 keyboard serial clock input
input ps2_din, // PS/2 keyboard serial data input
input [1:0] button
// Outputs to VGA display
output vga_h_sync, // hozizontal VGA sync pulse
output vga_v_sync, // vertical VGA sync pulse
output [2:0] vga_r, // red VGA signal
output [2:0] vga_g, // green VGA signal
output [2:0] vga_b, // blue VGA signal
// Debugging ports
input [1:0] button // 2 buttons on board
);
wire clk25;
pll pll(.clock_in(clk),
// 100MHz to 25MHz
pll pll(
.clock_in(clk),
.clock_out(clk25),
);
@ -54,16 +67,29 @@ module apple1_top(
assign vga_b[2:0] = vga_bit ? 3'b100 : 3'b000;
// apple one main system
apple1 my_apple1(
apple1 #(
.BASIC_FILENAME (BASIC_FILENAME),
.FONT_ROM_FILENAME (FONT_ROM_FILENAME),
.RAM_FILENAME (RAM_FILENAME),
.VRAM_FILENAME (VRAM_FILENAME),
.WOZMON_ROM_FILENAME (WOZMON_ROM_FILENAME)
) my_apple1(
.clk25(clk25),
.rst_n(button[0]),
.uart_rx(uart_rx),
.uart_tx(uart_tx),
.uart_cts(uart_cts),
.clr_screen_btn(0),
.ps2_clk(ps2_clk),
.ps2_din(ps2_din),
.ps2_select(1'b1), // PS/2 enabled, UART TX disabled
//.ps2_select(1'b0), // PS/2 disabled, UART TX enabled
.vga_h_sync(vga_h_sync),
.vga_v_sync(vga_v_sync),
.vga_red(vga_bit),
.ps2_select(1'b0),
//.vga_grn(vga_bit),
//.vga_blu(vga_bit),
);
endmodule