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Updated the omilex board support
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boards/olimex_ice40hx8k_evb_ice40-io/README.md
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boards/olimex_ice40hx8k_evb_ice40-io/README.md
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# Olimex iCE40HX8K-EVB + ICE40_IO support
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This adds support for building the apple one design for [Olimex iCE40hx8k-evb board](https://www.olimex.com/Products/FPGA/iCE40/iCE40HX8K-EVB/open-source-hardware) with attached [Olimex iCE40-IO extension](https://www.olimex.com/Products/FPGA/iCE40/iCE40-IO/open-source-hardware) for vga and ps2
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## Peripheral support
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VGA port is working throught the iCE40-IO expansion.
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A usb-serial converter can be attached on pins 5(RX), 7(TX), 9(CTS) on either the iCE40-IO extension or witout it directly to the header of the FPGA board (pin out is the same).
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Consult the schematics for [iCE40-IO](https://github.com/OLIMEX/iCE40-IO/raw/master/ICE40-IO_Rev_A.pdf) and
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[iCE40HX8K-EVB](https://github.com/OLIMEX/iCE40HX8K-EVB/blob/master/HARDWARE/REV-B/iCE40HX8K-EVB_Rev_B.pdf) for extension header pinmap.
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This port is using 1 PLL for generating the target 25Mhz clock.
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## Building
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Install a recent IceStorm toolchain, and:
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```
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$ cd yosys
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$ make
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```
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## Use
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There are 2 possible ways for flashing the board:
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1. [Olimex OLIMEXINO-32U4 as programmer](https://www.olimex.com/wiki/ICE40HX1K-EVB#Preparing_OLIMEXINO-32U4_as_programmer)
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2. [Iceprog with Raspberry PI](https://www.olimex.com/wiki/ICE40HX1K-EVB#Iceprog_with_Raspberry_PI)
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To load BASIC type "E000R" with CAPS LOCK on.
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@ -9,7 +9,7 @@ set_io uart_rx E4
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set_io uart_tx B2
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set_io uart_tx B2
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set_io uart_cts F5
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set_io uart_cts F5
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### Buttons
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set_io button[0] K11
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set_io button[0] K11
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set_io button[1] P13
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set_io button[1] P13
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@ -26,3 +26,7 @@ set_io vga_g[2] H6
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set_io vga_b[0] F1
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set_io vga_b[0] F1
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set_io vga_b[1] H4
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set_io vga_b[1] H4
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set_io vga_b[2] G2
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set_io vga_b[2] G2
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### PS/2 Keyboard
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set_io ps2_clk G1
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set_io ps2_din J5
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1
boards/olimex_ice40hx8k_evb_ice40-io/yosys/ice40hx8k.pcf
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boards/olimex_ice40hx8k_evb_ice40-io/yosys/ice40hx8k.pcf
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../ice40hx8k.pcf
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@ -1,28 +0,0 @@
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# Olimex iCE40hx8k-evb support
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This adds support for building apple one design for [Olimex iCE40hx8k-evb board](https://www.olimex.com/Products/FPGA/iCE40/iCE40HX8K-EVB/open-source-hardware) with attached [Olimex iCE40-IO extension](https://www.olimex.com/Products/FPGA/iCE40/iCE40-IO/open-source-hardware) for vga and ps2
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## Peripheral support
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VGA port is working trought the iCE40-IO expansion.
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A usb-serial converter can be attached on pins 5(RX), 7(TX), 9(CTS) on either the iCE40-IO extension or witout it directly to the header of the FPGA board (pin out is the same). Consult the schematics for [iCE40-IO](https://github.com/OLIMEX/iCE40-IO/raw/master/ICE40-IO_Rev_A.pdf) and [iCE40HX8K-EVB](https://github.com/OLIMEX/iCE40HX8K-EVB/blob/master/HARDWARE/REV-B/iCE40HX8K-EVB_Rev_B.pdf) for extension header pinmap.
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The iCE40-IO board has a ps2 connector you can use if you have a ps2 keyboard but it's not edded to the design pin map.
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This port is using 1 PLL for generating the target 25Mhz clock.
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## Building
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Install a recent IceStorm toolchain, and:
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make
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## Use
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There are 2 possible ways for flashing the board:
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1. [Olimex OLIMEXINO-32U4 as programmer](https://www.olimex.com/wiki/ICE40HX1K-EVB#Preparing_OLIMEXINO-32U4_as_programmer)
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2. [Iceprog with Raspberry PI](https://www.olimex.com/wiki/ICE40HX1K-EVB#Iceprog_with_Raspberry_PI)
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To load BASIC type "E000R" with CAPS LOCK on.
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@ -37,20 +37,20 @@ module apple1_top #(
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output uart_cts, // clear to send flag to computer
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output uart_cts, // clear to send flag to computer
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// I/O interface to keyboard
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// I/O interface to keyboard
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input ps2_clk, // PS/2 keyboard serial clock input
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input ps2_clk, // PS/2 keyboard serial clock input
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input ps2_din, // PS/2 keyboard serial data input
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input ps2_din, // PS/2 keyboard serial data input
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// Outputs to VGA display
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// Outputs to VGA display
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output vga_h_sync, // hozizontal VGA sync pulse
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output vga_h_sync, // hozizontal VGA sync pulse
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output vga_v_sync, // vertical VGA sync pulse
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output vga_v_sync, // vertical VGA sync pulse
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output reg vga_red, // red VGA signal
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output reg vga_red, // red VGA signal
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output reg vga_grn, // green VGA signal
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output reg vga_grn, // green VGA signal
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output reg vga_blu, // blue VGA signal
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output reg vga_blu, // blue VGA signal
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// Debugging ports
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// Debugging ports
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output [7:0] led, // 8 LEDs on the iCE40HX8K board
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output [7:0] led, // 8 LEDs on the iCE40HX8K board
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output [7:0] ledx, // 8 LEDs on optionally attached YL-4 board
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output [7:0] ledx, // 8 LEDs on optionally attached YL-4 board
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input [3:0] button // 4 buttons on optionall attached YL-4 board
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input [3:0] button // 4 buttons on optionally attached YL-4 board
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);
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);
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wire clk25;
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wire clk25;
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@ -15,14 +15,20 @@
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// specific language governing permissions and limitations
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// specific language governing permissions and limitations
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// under the License.
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// under the License.
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//
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//
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// Description: Apple 1 implementation for the iCE40HX8K dev
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// Description: Apple 1 implementation for the Omilex iCE40HX8K +
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// board.
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// the ICE40-IO interface
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//
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//
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// Author.....: Alan Garfield
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// Author.....: Alan Garfield
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// Date.......: 26-1-2018
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// Date.......: 26-1-2018
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//
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//
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module apple1_top(
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module apple1_top #(
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parameter BASIC_FILENAME = "../../../roms/basic.hex",
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parameter FONT_ROM_FILENAME = "../../../roms/vga_font_bitreversed.hex",
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parameter RAM_FILENAME = "../../../roms/ram.hex",
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parameter VRAM_FILENAME = "../../../roms/vga_vram.bin",
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parameter WOZMON_ROM_FILENAME = "../../../roms/wozmon.hex"
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) (
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input clk, // 100 MHz board clock
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input clk, // 100 MHz board clock
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// I/O interface to computer
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// I/O interface to computer
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@ -30,19 +36,26 @@ module apple1_top(
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output uart_tx, // asynchronous serial data output to computer
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output uart_tx, // asynchronous serial data output to computer
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output uart_cts, // clear to send flag to computer
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output uart_cts, // clear to send flag to computer
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// Outputs to VGA display
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// I/O interface to keyboard
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output vga_h_sync, // hozizontal VGA sync pulse
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input ps2_clk, // PS/2 keyboard serial clock input
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output vga_v_sync, // vertical VGA sync pulse
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input ps2_din, // PS/2 keyboard serial data input
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output [2:0] vga_r, // red VGA signal
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output [2:0] vga_g, // green VGA signal
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output [2:0] vga_b, // blue VGA signal
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input [1:0] button
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// Outputs to VGA display
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output vga_h_sync, // hozizontal VGA sync pulse
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output vga_v_sync, // vertical VGA sync pulse
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output [2:0] vga_r, // red VGA signal
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output [2:0] vga_g, // green VGA signal
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output [2:0] vga_b, // blue VGA signal
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// Debugging ports
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input [1:0] button // 2 buttons on board
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);
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);
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wire clk25;
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wire clk25;
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pll pll(.clock_in(clk),
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// 100MHz to 25MHz
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pll pll(
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.clock_in(clk),
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.clock_out(clk25),
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.clock_out(clk25),
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);
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);
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@ -54,16 +67,29 @@ module apple1_top(
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assign vga_b[2:0] = vga_bit ? 3'b100 : 3'b000;
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assign vga_b[2:0] = vga_bit ? 3'b100 : 3'b000;
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// apple one main system
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// apple one main system
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apple1 my_apple1(
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apple1 #(
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.BASIC_FILENAME (BASIC_FILENAME),
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.FONT_ROM_FILENAME (FONT_ROM_FILENAME),
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.RAM_FILENAME (RAM_FILENAME),
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.VRAM_FILENAME (VRAM_FILENAME),
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.WOZMON_ROM_FILENAME (WOZMON_ROM_FILENAME)
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) my_apple1(
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.clk25(clk25),
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.clk25(clk25),
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.rst_n(button[0]),
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.rst_n(button[0]),
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.uart_rx(uart_rx),
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.uart_rx(uart_rx),
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.uart_tx(uart_tx),
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.uart_tx(uart_tx),
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.uart_cts(uart_cts),
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.uart_cts(uart_cts),
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.clr_screen_btn(0),
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.ps2_clk(ps2_clk),
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.ps2_din(ps2_din),
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.ps2_select(1'b1), // PS/2 enabled, UART TX disabled
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//.ps2_select(1'b0), // PS/2 disabled, UART TX enabled
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.vga_h_sync(vga_h_sync),
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.vga_h_sync(vga_h_sync),
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.vga_v_sync(vga_v_sync),
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.vga_v_sync(vga_v_sync),
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.vga_red(vga_bit),
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.vga_red(vga_bit),
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.ps2_select(1'b0),
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//.vga_grn(vga_bit),
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//.vga_blu(vga_bit),
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);
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);
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endmodule
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endmodule
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