boards: icoboard support
Signed-off-by: Paolo Pisati <p.pisati@gmail.com>
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Paolo Pisati
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@ -7,6 +7,7 @@ This is a basic implementation of the original Apple 1 in Verilog. It can run th
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Contributor supported boards (YMMV):
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- [Blackice II](https://www.tindie.com/products/Folknology/blackice-ii/)
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- [icoBoard](http://icoboard.org/)
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- [Olimex iCE40HX8K with ICE40-IO](https://www.olimex.com/Products/FPGA/iCE40/iCE40HX8K-EVB/open-source-hardware)
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- [TinyFPGA B2](http://tinyfpga.com/)
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- [Upduino](http://gnarlygrey.atspace.cc/development-platform.html)
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@ -0,0 +1,28 @@
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# icoBoard with Digilent Pmods support
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This adds support for building the apple one design for
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[icoBoard](http://icoboard.org/about-icoboard.html) with attached Digilent Pmods
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for VGA, PS/2 or UART.
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## Peripheral support
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VGA port is working through a Digilent VGA Pmod on Pmod 1/2.
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PS/2 works through a Digilent PS/2 Pmod on Pmod 3 upper row.
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UART works through a Digilent USBUART Pmod on Pmod 4 upper row.
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By default, UART is enabled (and PS/2 is off), check
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rtl/boards/icoboard/apple1_hx8k.v.
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## Building
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Install a recent IceStorm toolchain, and:
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```
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$ cd yosys
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$ make apple1
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```
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## Use
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To load BASIC type "E000R" with CAPS LOCK on.
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@ -0,0 +1,79 @@
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DEVICE = hx8k
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PIN_DEF = icoboard.pcf
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FREQ_OSC = 100
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FREQ_PLL = 25
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SOURCEDIR = ../../../rtl
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BUILDDIR = build
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PLL = $(BUILDDIR)/pll.sv
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all: apple1 prog
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info:
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@echo " To build: make apple1"
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@echo " To program: make prog"
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@echo "To build report: make report"
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@echo " To clean up: make clean"
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dir:
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mkdir -p $(BUILDDIR)
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# ------ TEMPLATES ------
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$(BUILDDIR)/%.blif: $(SOURCEDIR)/%.v
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yosys -q -p "chparam -list; hierarchy -top apple1_top; synth_ice40 -blif $@" $^
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$(BUILDDIR)/%.asc: $(PIN_DEF) $(BUILDDIR)/%.blif
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arachne-pnr -d 8k -o $@ -p $^
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$(BUILDDIR)/%.bin: $(BUILDDIR)/%.asc
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icepack $^ $@
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%.rpt: $(BUILDDIR)/%.asc
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icetime -d $(DEVICE) -c $(FREQ_PLL) -mtr $@ $<
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%_tb.vvp: %_tb.v %.v
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iverilog -o $@ $^
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%_tb.vcd: %_tb.vvp
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vvp -N $< +vcd=$@
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$(PLL):
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icepll $(QUIET) -i $(FREQ_OSC) -o $(FREQ_PLL) -m -f $@
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# ------ APPLE 1 ------
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apple1: dir $(PLL) $(BUILDDIR)/apple1.bin
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report: dir apple1.rpt
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$(BUILDDIR)/apple1.bin: $(BUILDDIR)/apple1.asc
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$(BUILDDIR)/apple1.asc: $(BUILDDIR)/apple1.blif
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$(BUILDDIR)/apple1.blif: $(SOURCEDIR)/apple1.v \
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$(SOURCEDIR)/clock.v \
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$(SOURCEDIR)/pwr_reset.v \
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$(SOURCEDIR)/ram.v \
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$(SOURCEDIR)/rom_wozmon.v \
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$(SOURCEDIR)/rom_basic.v \
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$(SOURCEDIR)/cpu/arlet_6502.v \
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$(SOURCEDIR)/cpu/arlet/ALU.v \
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$(SOURCEDIR)/cpu/arlet/cpu.v \
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$(SOURCEDIR)/uart/uart.v \
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$(SOURCEDIR)/uart/async_tx_rx.v \
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$(SOURCEDIR)/vga/vga.v \
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$(SOURCEDIR)/vga/vram.v \
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$(SOURCEDIR)/vga/font_rom.v \
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$(SOURCEDIR)/ps2keyboard/debounce.v \
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$(SOURCEDIR)/ps2keyboard/ps2keyboard.v \
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$(SOURCEDIR)/boards/icoboard/apple1_hx8k.v \
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$(BUILDDIR)/pll.sv
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apple1.rpt: $(BUILDDIR)/apple1.asc
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prog: dir $(BUILDDIR)/apple1.bin
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icoprog -p < $(BUILDDIR)/apple1.bin
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# ------ HELPERS ------
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clean:
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rm -rf build apple1.rpt
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.SECONDARY:
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.PHONY: all info clean prog iceprog
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@ -0,0 +1,42 @@
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# For the icoBoard
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### 100Mhz clk
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set_io clk R9
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### VGA display
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set_io vga_h_sync B8
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set_io vga_v_sync A9
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set_io vga_r[0] A5
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set_io vga_r[1] A2
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set_io vga_r[2] C3
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set_io vga_r[3] B4
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set_io vga_g[0] D8
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set_io vga_g[1] B9
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set_io vga_g[2] B10
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set_io vga_g[3] B11
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set_io vga_b[0] B7
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set_io vga_b[1] B6
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set_io vga_b[2] B3
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set_io vga_b[3] B5
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### LEDs
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# onboard LEDs
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set_io led[0] C8
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set_io led[1] F7
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### PS/2
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set_io ps2_din L9
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set_io ps2_clk L7
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### Buttons
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# onboard buttons
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set_io button[0] K11
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set_io button[1] P13
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### UART
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#set_io uart_rts T15
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#set_io uart_rx T14
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#set_io uart_tx T11
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set_io uart_rx T11
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set_io uart_tx T14
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set_io uart_cts R10
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@ -0,0 +1,105 @@
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// Licensed to the Apache Software Foundation (ASF) under one
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// or more contributor license agreements. See the NOTICE file
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// distributed with this work for additional information
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// regarding copyright ownership. The ASF licenses this file
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// to you under the Apache License, Version 2.0 (the
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// "License"); you may not use this file except in compliance
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// with the License. You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing,
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// software distributed under the License is distributed on an
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// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
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// KIND, either express or implied. See the License for the
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// specific language governing permissions and limitations
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// under the License.
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//
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// Description: Apple 1 implementation for the icoBoard
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//
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// Author.....: Paolo Pisati (inspired from blackice2/apple1_hx8k.v)
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// Date.......: 05-11-2019
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//
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module apple1_top #(
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parameter BASIC_FILENAME = "../../../roms/basic.hex",
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parameter FONT_ROM_FILENAME = "../../../roms/vga_font_bitreversed.hex",
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parameter RAM_FILENAME = "../../../roms/ram.hex",
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parameter VRAM_FILENAME = "../../../roms/vga_vram.bin",
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parameter WOZMON_ROM_FILENAME = "../../../roms/wozmon.hex"
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) (
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input clk, // 100 MHz board clock
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// I/O interface to computer
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input uart_rx, // asynchronous serial data input from computer
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output uart_tx, // asynchronous serial data output to computer
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output uart_cts, // clear to send flag to computer - not used
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// I/O interface to keyboard
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input ps2_clk, // PS/2 keyboard serial clock input
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input ps2_din, // PS/2 keyboard serial data input
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// Outputs to VGA display
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output vga_h_sync, // hozizontal VGA sync pulse
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output vga_v_sync, // vertical VGA sync pulse
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output [3:0] vga_r, // red VGA signal
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output [3:0] vga_g, // green VGA signal
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output [3:0] vga_b, // blue VGA signal
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// Debugging ports
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output [1:0] led,
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input [1:0] button // 2 buttons on board
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);
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assign led[0] = reset_n;
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assign led[1] = clr_screen_n;
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wire clk25;
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// 100MHz down to 25MHz
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pll my_pll(
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.clock_in(clk),
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.clock_out(clk25)
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);
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wire vga_bit;
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// set the monochrome base colour here..
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assign vga_r[3:0] = vga_bit ? 4'b1000 : 4'b0000;
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assign vga_g[3:0] = vga_bit ? 4'b1111 : 4'b0000;
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assign vga_b[3:0] = vga_bit ? 4'b1000 : 4'b0000;
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wire reset_n;
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assign reset_n = ~button[0];
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wire clr_screen_n;
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assign clr_screen_n = ~button[1];
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// apple one main system
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apple1 #(
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.BASIC_FILENAME (BASIC_FILENAME),
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.FONT_ROM_FILENAME (FONT_ROM_FILENAME),
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.RAM_FILENAME (RAM_FILENAME),
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.VRAM_FILENAME (VRAM_FILENAME),
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.WOZMON_ROM_FILENAME (WOZMON_ROM_FILENAME)
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) my_apple1(
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.clk25(clk25),
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.rst_n(reset_n),
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.uart_rx(uart_rx),
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.uart_tx(uart_tx),
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.uart_cts(uart_cts),
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.ps2_clk(ps2_clk),
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.ps2_din(ps2_din),
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//.ps2_select(1'b1), // PS/2 not working, at the moment
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.ps2_select(1'b0), // PS/2 disabled, UART TX enabled
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.vga_h_sync(vga_h_sync),
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.vga_v_sync(vga_v_sync),
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.vga_red(vga_bit),
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//.vga_grn(vga_bit),
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//.vga_blu(vga_bit),
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.vga_cls(~clr_screen_n),
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);
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endmodule
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