Apple-1-HW/verilog-apple-one
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Merge pull request #15 from olofk/s3e-fusesoc

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Add FuseSoC support for s3e-starterkit
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Niels Moseley 2018-02-12 22:31:16 +01:00 committed by GitHub
commit e4cf24dd0e
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1 changed files with 15 additions and 0 deletions
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apple-one.core
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@ -58,6 +58,10 @@ filesets:
- tools/iverilog/apple1_tb.v
file_type : verilogSource
s3e_starterkit:
files:
- boards/spartan3e_starterkit/webpack_ise/apple1_s3e_starterkit_top.ucf : {file_type : UCF}
- rtl/boards/spartan3e_starterkit/apple1_s3e_starterkit_top.v : {file_type : verilogSource}
tinyfpga_b2:
files:
- boards/tinyfpga_b2/yosys/tinyfpga.pcf : {file_type : PCF}
@ -90,6 +94,17 @@ targets:
modelsim:
vlog_options : [+define+SIM]
s3e_starterkit:
default_tool : ise
filesets : [main, synth, cpu, uart, vga, ps2keyboard, s3e_starterkit]
parameters : [BASIC_FILENAME, FONT_ROM_FILENAME, RAM_FILENAME, VRAM_FILENAME, WOZMON_ROM_FILENAME]
tools :
ise :
family : Spartan3E
device : xc3s500e
package : fg320
speed : -4
toplevel : [apple1_s3e_starterkit_top]
tinyfpga_b2:
default_tool : icestorm
filesets : [main, synth, cpu, uart, vga, ps2keyboard, tinyfpga_b2]