Apple-1-HW/verilog-apple-one
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added pretend UART RX waveform

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This commit is contained in:
Alan Garfield 2018-01-28 00:21:48 +11:00
parent b42567e759
commit f081eb674f
1 changed files with 22 additions and 7 deletions
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17
iverilog/apple1_tb.v
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@ -106,7 +106,7 @@ module apple1_tb;
force core_top.my_cpu.arlet_cpu.ALU.temp_h = 0;
clk25 = 1'b0;
uart_rx = 1'b0;
uart_rx = 1'b1;
rst_n = 1'b0;
#40 rst_n = 1'b1;
@ -186,6 +186,21 @@ module apple1_tb;
$display("Starting...");
$dumpfile("apple1_top_tb.vcd");
$dumpvars;
#180000
uart_rx = 1'b0;
#400
uart_rx = 1'b1;
#400
uart_rx = 1'b0;
#400
uart_rx = 1'b1;
#800
uart_rx = 1'b0;
#1600
uart_rx = 1'b1;
#1000000 $display("Stopping...");
$finish;
end