Alan Garfield
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ea220fb9ab
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added uart testbench to look at cts signal
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2018-02-16 13:40:46 +11:00 |
Niels Moseley
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0d0c3ed811
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Merge pull request #14 from olofk/fusesoc
Fusesoc
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2018-02-12 15:56:44 +01:00 |
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Niels Moseley
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bad08ec595
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Fixed ise_hexer to filter out more rubbish characters. Fixed S3E starterkit toplevel (ROM/RAM parameters)
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2018-02-12 15:53:02 +01:00 |
Olof Kindgren
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3a330aeccb
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Remove non-existing port assignments
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2018-02-12 15:19:40 +01:00 |
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Olof Kindgren
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2226afe669
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Expose ROM/RAM files as top-level parameters
This allows file names to be overridden at compile-time.
It also gets rid of the ifdef SIM in the verilog components
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2018-02-12 14:04:00 +01:00 |
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Niels Moseley
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9bf7d101cc
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Light maintenance.
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2018-02-12 01:57:15 +01:00 |
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Niels Moseley
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77b5847611
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Added Spartan 3E starter kit implementation (work in progress!).
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2018-02-12 01:52:10 +01:00 |
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Alan Garfield
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120dac091b
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Moved test benches to tools
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2018-02-12 07:02:41 +11:00 |
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Niels Moseley
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894c50ff4e
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Added debounced PS/2 keyboard interface and A1 top-level selection between keyboard and UART RX
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2018-02-08 23:47:09 +01:00 |
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Niels Moseley
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237d35491a
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Fixed Quartus VGA reversal bug/feature. Removed bit reversing logic and created bit-reversed font rom hex file
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2018-02-08 17:51:30 +01:00 |
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Niels Moseley
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7886763229
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Added VGA font rom conversion program.
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2018-02-07 19:24:14 +01:00 |