Apple-1-HW/verilog-apple-one
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19 Commits 3 Branches 0 Tags 6.9 MiB
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4 Commits

Author SHA1 Message Date
Alan Garfield
92dd0d2e71 moved sources into rtl to clean up root 2018-01-12 13:40:44 +11:00
Alan Garfield
697bd34798 Fixed issue with basic ROM 2018-01-12 01:01:34 +11:00
Alan Garfield
158510c299 Added basic ROM and fiddled things 
Clock now runs at 6MHz while I try to simplify things to figure out a
CPU bug
 2018-01-10 16:39:18 +11:00
Alan Garfield
8aad887a5e Initial commit 2018-01-02 00:33:20 +11:00