Apple-1-HW/verilog-apple-one
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173 Commits 3 Branches 0 Tags 6.9 MiB
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Commit Graph

8 Commits

Author SHA1 Message Date
Alan Garfield
37c3898d9f added font and colour support at 0xC000-0xC002 2018-02-18 17:52:19 +11:00
Alan Garfield
48f6f7b78d removed vga font mode switch from software control 2018-02-16 14:38:18 +11:00
Alan Garfield
11bef736b4 Added toggle button on ice40hx8k breakout to switch from PS2 to Uart 2018-02-16 14:02:02 +11:00
Alan Garfield
b7f3f186f7 Added clear screen button 2018-02-16 13:43:43 +11:00
Alan Garfield
526538a685 fixed param paths for yosys, may need more work 2018-02-14 15:27:36 +11:00
Alan Garfield
78b3c6f5c6 Updated the omilex board support 2018-02-14 11:38:26 +11:00
Olof Kindgren
2226afe669 Expose ROM/RAM files as top-level parameters 
This allows file names to be overridden at compile-time.

It also gets rid of the ifdef SIM in the verilog components
 2018-02-12 14:04:00 +01:00
Alan Garfield
ffad5968b6 moved tinyfpga rtl to rtl/boards 2018-02-12 08:43:29 +11:00