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Apple-1-HW
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verilog-apple-one
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https://github.com/alangarf/apple-one.git
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7a260619a52ece9062ef47f34078f16ce987b84b
verilog-apple-one
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rtl
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History
Niels Moseley
7a260619a5
* Added missing S3E top level verilog file.
...
* Updated wozmon.hex to be ISE compliant.
2018-02-12 16:24:16 +01:00
..
ice40hx8k-b-evn
Expose ROM/RAM files as top-level parameters
2018-02-12 14:04:00 +01:00
spartan3e_starterkit
* Added missing S3E top level verilog file.
2018-02-12 16:24:16 +01:00
terasic_de0
Expose ROM/RAM files as top-level parameters
2018-02-12 14:04:00 +01:00
tinyfpga_b2
Remove non-existing port assignments
2018-02-12 15:19:40 +01:00
upduino
Expose ROM/RAM files as top-level parameters
2018-02-12 14:04:00 +01:00
